AMD-K6-IIIE+550ACR AMD (ADVANCED MICRO DEVICES), AMD-K6-IIIE+550ACR Datasheet - Page 78
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AMD-K6-IIIE+550ACR
Manufacturer Part Number
AMD-K6-IIIE+550ACR
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.AMD-K6-IIIE550ACR.pdf
(370 pages)
Specifications of AMD-K6-IIIE+550ACR
Lead Free Status / RoHS Status
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AMD-K6™-IIIE+ Embedded Processor Data Sheet
3.4
Figure 46. 4-Kbyte Paging Mechanism
56
31
CR3
Page Directory
Paging
Offset
The AMD-K6-IIIE+ processor can physically address up to four
Gbytes of memory. This memory can be segmented into pages.
The size of these pages is determined by the operating system
design and the values set up in the page directory entries (PDE)
and page table entries (PTE).
The processor can access both 4-Kbyte pages and 4-Mbyte
pages, and the page sizes can be intermixed within a page
directory. When the page size extension (PSE) bit in CR4 is set,
the processor translates linear addresses using either the
4-Kbyte translation lookaside buffer (TLB) or the 4-Mbyte TLB,
depending on the state of the page size (PS) bit in the page
directory entry. Figures 46 and Figure 47 on page 57 show how
4-Kbyte and 4-Mbyte page translations work.
Directory
Page
PDE
22
21
Preliminary Information
Software Environment
Page Table
Linear Address
Offset
Table
Page
PTE
12
11
Offset
Page
Physical
Address
23543A/0—September 2000
4-Kbyte
Frame
Page
Chapter 3
0
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