AMD-K6-IIIE+550ACR AMD (ADVANCED MICRO DEVICES), AMD-K6-IIIE+550ACR Datasheet - Page 297
AMD-K6-IIIE+550ACR
Manufacturer Part Number
AMD-K6-IIIE+550ACR
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.AMD-K6-IIIE550ACR.pdf
(370 pages)
Specifications of AMD-K6-IIIE+550ACR
Lead Free Status / RoHS Status
Not Compliant
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23543A/0—September 2000
Chapter 13
Interrupt 01h. The following events are considered debug traps
that cause the processor to generate an Interrupt 01h
exception:
The following events are considered debug faults that cause the
processor to generate an Interrupt 01h exception:
Interrupt 03h. The INT 3 instruction is defined in the x86
architecture as a breakpoint instruction. This instruction
causes the processor to generate an Interrupt 03h exception.
This exception is a debug trap because the debugger is called
following the execution of the INT 3 instruction.
The INT 3 instruction is a one-byte instruction (opcode CCh)
typically used to insert a breakpoint in software by writing CCh
to the address of the first byte of the instruction to be trapped
(the target instruction). Following the trap, if the target
instruction is to be executed, the debugger must replace the
INT 3 instruction with the first byte of the target instruction.
Enabled breakpoints for data and I/O cycles
Single Step Trap
Task Switch Trap
Enabled breakpoints for instruction execution
BD bit in DR6 set to 1
Test and Debug
AMD-K6™-IIIE+ Embedded Processor Data Sheet
275
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