LPC47M107S-MS Standard Microsystems (SMSC), LPC47M107S-MS Datasheet - Page 99

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LPC47M107S-MS

Manufacturer Part Number
LPC47M107S-MS
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of LPC47M107S-MS

Pin Count
100
Lead Free Status / RoHS Status
Compliant

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Bit 1 of Port 92, the ALT_A20 signal, is used to force nA20M to the CPU low for support of real mode compatible
software. This signal is externally OR’ed with the A20GATE signal from the keyboard controller and CPURST to
control the nA20M input of the CPU. Writing a 0 to bit 1 of the Port 92 Register forces ALT_A20 low. ALT_A20 low
drives nA20M to the CPU low, if A20GATE from the keyboard controller is also low. Writing a 1 to bit 1 of the Port 92
Register forces ALT_A20 high. ALT_A20 high drives nA20M to the CPU high, regardless of the state of A20GATE
from the keyboard controller. Upon reset, this signal is driven low.
Note: When Port 92 is disabled,
writes are ignored and reads
return undefined values.
P92
8042
Bit 0
P20
Pulse
Gen
14us
KRST_GA20
Bit 2
Page 99
6us
14us
KRST
6us
nALT_RST
KBDRST

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