LPC47M107S-MS Standard Microsystems (SMSC), LPC47M107S-MS Datasheet - Page 153

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LPC47M107S-MS

Manufacturer Part Number
LPC47M107S-MS
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of LPC47M107S-MS

Pin Count
100
Lead Free Status / RoHS Status
Compliant

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Note:
Note:
Note:
Note 1: The default value of the Primary Interrupt Select register for logical device 0 is 0x06.
Note:
Note:
Note 1: The default value of the DMA Channel Select register for logical device 0 (FDD) is 0x02 and for logical device
Note A. Logical Device IRQ and DMA Operation
1.
register bit in that logical block, the IRQ and/or DMA channel must be disabled. This is in addition to the IRQ and DMA
channel disabled by the Configuration Registers (active bit or address not valid).
a.
b.
c.
d.
DMA Channel
Select
Default=0x02 or
0x04
on VCC POR,
VTR POR,
HARD RESET
and
SOFT RESET
nSMI must be disabled to use IRQ2.
IRQs are disabled if not used/selected by any Logical Device. Refer to Note A.
All IRQ’s are available in Serial IRQ mode.
A DMA channel is activated by setting the DMA Channel Select register to [0x01-0x03] AND:
For the FDC logical device by setting DMAEN, bit D3 of the Digital Output Register.
For the PP logical device in ECP mode by setting dmaEn, bit D3 of the ecr.
DMA channels are disabled if not used/selected by any Logical Device. Refer to Note A.
3 and 5 is 0x04.
IRQ and DMA Enable and Disable: Any time the IRQ or DMA channel for a logical block is disabled by a
FDC: For the following cases, the IRQ and DMA channel used by the FDC are disabled. Will not respond to
the DMA request.
Digital Output Register (Base+2) bit D3 (DMAEN) set to "0".
The FDC is in power down (disabled).
Serial Ports:
Parallel Port:
I.
disabled.
ii.
Keyboard Controller: Refer to the KBD section of this spec.
Modem Control Register (MCR) Bit D2 (OUT2) - When OUT2 is a logic "0", the serial port interrupt is
disabled.
NAME
(Note 1)
For the KYBD by (refer to the KYBD controller section of this spec).
SPP and EPP modes: Control Port (Base+2) bit D4 (IRQE) set to "0", IRQ is
ECP Mode:
(1)
(2)
Table 67 - DMA Channel Select Configuration Register Description
(FROM ECR REGISTER)
000
001
010
011
100
101
110
111
(DMA) dmaEn from ecr register. See table.
IRQ - See table.
REG INDEX
0x74 (R/W)
MODE
PRINTER
CONFIG
Bits[2:0] select the DMA Channel.
TEST
FIFO
SPP
ECP
EPP
RES
Page 153
0x00= Reserved
0x01= DMA1
0x02= DMA2
0x03= DMA3
0x04-0x07= No DMA active
CONTROLLED BY
IRQ PIN
IRQE
IRQE
IRQE
IRQE
IRQE
DEFINITION
(on)
(on)
(on)
CONTROLLED BY
PDREQ PIN
dmaEn
dmaEn
dmaEn
dmaEn
dmaEn
dmaEn
dmaEn
dmaEn
STATE
C

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