LPC47M107S-MS Standard Microsystems (SMSC), LPC47M107S-MS Datasheet - Page 30

• Manufacturer Part Number: LPC47M107S-MS
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LPC47M107S-MS

• Pin Count: 100
• Lead Free Status / RoHS Status: Compliant

DIGITAL INPUT REGISTER (DIR)
Address 3F7 READ ONLY
This register is read-only in all modes.
PC-AT Mode
BIT 0 - 6 UNDEFINED
The data bus outputs D0 - 6 are read as ‘0’.
BIT 7 DSKCHG
This bit monitors the pin of the same name and reflects the opposite value seen on the disk cable or the value
programmed in the Force Disk Change Register (see Runtime Register at offset 0x1E).
PS/2 Mode
BIT 0 nHIGH DENS
This bit is low whenever the 500 Kbps or 1 Mbps data rates are selected, and high when 250 Kbps and 300 Kbps are
selected.
BITS 1 - 2 DATA RATE SELECT
These bits control the data rate of the floppy controller. See Table 8 for the settings corresponding to the individual data
rates. The data rate select bits are unaffected by a software reset, and are set to 250 Kbps after a hardware reset.
BITS 3 - 6 UNDEFINED
Always read as a logic "1"
BIT 7 DSKCHG
This bit monitors the pin of the same name and reflects the opposite value seen on the disk cable or the value
programmed in the Force Disk Change Register (see Runtime Register at offset 0x1E).
Model 30 Mode
BITS 0 - 1 DATA RATE SELECT
These bits control the data rate of the floppy controller. See Table 8 for the settings corresponding to the individual data
rates. The data rate select bits are unaffected by a software reset, and are set to 250 Kbps after a hardware reset.
RESET
COND.
RESET
RESET
COND.
COND.
CHG
CHG
DSK
DSK
N/A
CHG
N/A
DSK
N/A
7
7
7
N/A
N/A
6
0
0
6
1
6
0
N/A
N/A
0
5
0
5
1
5
0
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N/A
N/A
4
0
0
4
1
4
0
DMAEN NOPREC DRATE
N/A
N/A
3
0
3
1
3
0
DRATE
SEL1
N/A
N/A
2
2
0
2
0
DRATE
SEL0
N/A
N/A
SEL1
1
1
0
1
1
nDENS
nHIGH
DRATE
N/A
SEL0
0
1
0
0
0
0