LPC47M107S-MS Standard Microsystems (SMSC), LPC47M107S-MS Datasheet - Page 104

• Manufacturer Part Number: LPC47M107S-MS
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LPC47M107S-MS

• Pin Count: 100
• Lead Free Status / RoHS Status: Compliant

Note 1: The GPIO Data and Configuration Registers are located in PME block at the offset shown from the
GPIO Control
Each GPIO port has an 8-bit control register that controls the behavior of the pin. These registers are defined in the
“Runtime Registers” section of this specification.
Each GPIO port may be configured as either an input or an output. If the pin is configured as an output, it can be
programmed as open-drain or push-pull. Inputs and outputs can be configured as non-inverting or inverting. Bit[0] of
each GPIO Configuration Register determines the port direction, bit[1] determines the signal polarity, and bit[7]
determines the output driver type select. The GPIO configuration register Output Type select bit[7] applies to GPIO
functions and the nSMI Alternate functions.
The Polarity Bit (bit 1) of the GPIO control registers control the GPIO pin when the pin is configured for the GPIO
function and when the pin is configured for the alternate function for all pins, with the exception of the DDRC function
on GP43, the analog game port pins (J1X, J1Y, J2X, J2Y) and the either edge triggered interrupts. When the
alternate function is selected for the analog joystick pins (GP14, GP15, GP16 and GP17), these pins become open
drain, non-inverted outputs.
The basic GPIO configuration options are summarized in Table 56.
/QFP
N/A
100
N/A
PIN
NO.
28
92
94
95
96
97
98
99
48
49
PME_BLK address.
GPIO
Reserved
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
Reserved
FUNCTION
DEFAULT
SELECTED
FUNCTION
GPIO
Device
Disable Reg.
Control
Ring
Indicator 2
Data Carrier
Detect 2
Receive
Serial Data 2
Transmit
Serial Data 2
Data Set
Ready 2
Request to
Send 2
Clear to
Send 2
Date
Terminal
Ready
LED
LED
FUNC. 1
ALT.
DIRECTION
TABLE 56 - GPIO Configuration Summary
BIT
B0
0
0
1
1
FUNC. 2
EETI
EETI
ALT.
Page 104
POLARITY
FUNC. 3
EETI
ALT.
BIT
B1
0
1
0
1
REGISTER
DATA
Pin is a non-inverted output.
Pin is an inverted output.
Pin is a non-inverted input.
Pin is an inverted input.
GP5
GP6
1
DESCRIPTION
REGISTER BIT
DATA
NO.
7:4
7:2
3
0
1
2
3
4
5
6
7
0
1
REGISTE
OFFSET
(HEX)
4F
50
R