PIC18LF27J13T-I/SO Microchip Technology, PIC18LF27J13T-I/SO Datasheet - Page 292

no-image

PIC18LF27J13T-I/SO

Manufacturer Part Number
PIC18LF27J13T-I/SO
Description
28-pin, GP, 128KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC 28 SOIC .300in T/R
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets

Specifications of PIC18LF27J13T-I/SO

Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 2.75 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
registers. These include a status register (SSPxSTAT)
PIC18F47J13 FAMILY
20.2
Each MSSP module has three associated control
and two control registers (SSPxCON1 and SSPxCON2).
The use of these registers and their individual Configura-
tion bits differs significantly depending on whether the
MSSP module is operated in SPI or I
Additional details are provided under the individual
sections.
20.3
The SPI mode allows 8 bits of data to be synchronously
transmitted and received simultaneously. All four
modes of SPI are supported.
When MSSP2 is used in SPI mode, it can optionally be
configured to work with the SPI DMA submodule
described in Section 20.4 “SPI DMA Module”.
To accomplish communication, typically three pins are
used:
• Serial Data Out (SDOx) – RC5/SDO1/RP16 or
• Serial Data In (SDIx) – RC4/SDI1/SDA1/RP15 or
• Serial Clock (SCKx) – RC3/SCK1/SCL1/RP14 or
Additionally, a fourth pin may be used when in a Slave
mode of operation:
• Slave Select (SSx) – RA5/AN4/C1INC/SS1/
Figure 20-1 depicts the block diagram of the MSSP
module when operating in SPI mode.
DS39974A-page 292
Note:
SDO2/Remappable
SDI2/Remappable
SCK2/Remappable
HLVDIN/RP2 or SS2/Remappable
Control Registers
SPI Mode
In devices with more than one MSSP
module, it is very important to pay close
attention to the SSPxCON register names.
SSP1CON1 and
different operational aspects of the same
module,
SSP2CON1 control the same features for
two different modules.
while
SSP1CON2 control
SSP1CON1
2
C mode.
and
Preliminary
FIGURE 20-1:
Note:
SCKx
SDOx
SDIx
SSx
Only port I/O names are used in this diagram for
the sake of brevity. Refer to the text for a full list of
multiplexed functions.
Read
SSx Control
Select
SMP:CKE
Edge
bit 0
Select
Edge
Enable
MSSPx BLOCK DIAGRAM
(SPI MODE)
 2010 Microchip Technology Inc.
SSPxBUF reg
TRIS bit
Data to TXx/RXx in SSPxSR
SSPxSR reg
2
SSPM<3:0>
Clock Select
4
2
(
Prescaler
4, 8, 16, 64
TMR2 Output
Write
Clock
Shift
Data Bus
Internal
2
T
OSC
)

Related parts for PIC18LF27J13T-I/SO