PIC18LF27J13T-I/SO Microchip Technology, PIC18LF27J13T-I/SO Datasheet - Page 275

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PIC18LF27J13T-I/SO

Manufacturer Part Number
PIC18LF27J13T-I/SO
Description
28-pin, GP, 128KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC 28 SOIC .300in T/R
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets

Specifications of PIC18LF27J13T-I/SO

Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 2.75 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
19.4
The Enhanced PWM mode can generate a PWM signal
on up to four different output pins with up to 10 bits of
resolution. It can do this through four different PWM
Output modes:
• Single PWM mode
• Half-Bridge PWM mode
• Full-Bridge PWM, Forward mode
• Full-Bridge PWM, Reverse mode
To select an Enhanced PWM mode, the PxM bits of the
CCPxCON register must be set appropriately.
FIGURE 19-3:
 2010 Microchip Technology Inc.
Note 1: The TRIS register value for each PWM output must be configured appropriately.
Note 1: The 8-bit timer, TMR2 register, is concatenated with the 2-bit internal Q clock, or 2 bits of the prescaler, to
2: Any pin not used by an Enhanced PWM mode is available for alternate pin functions.
PWM (Enhanced Mode)
CCPR1H (Slave)
Duty Cycle Registers
Comparator
CCPR1L
PR2
TMR2
Comparator
create the 10-bit time base.
SIMPLIFIED BLOCK DIAGRAM OF THE ENHANCED PWM MODE EXAMPLE
(1)
Clear Timer2,
Toggle PWM Pin and
Latch Duty Cycle
DC1B<1:0>
R
S
PxM<1:0>
Q
Preliminary
ECCP1DEL
Controller
ECCPx/PxA
Output
PIC18F47J13 FAMILY
2
The PWM outputs are multiplexed with I/O pins and are
designated: PxA, PxB, PxC and PxD. The polarity of the
PWM pins is configurable and is selected by setting the
CCPxM bits in the CCPxCON register appropriately.
Table 19-1 provides the pin assignments for each
Enhanced PWM mode.
Figure 19-3 provides an example of a simplified block
diagram of the Enhanced PWM module.
Note:
PxC
PxD
PxB
4
CCPxM<3:0>
To
incomplete waveform when the PWM is
first enabled, the ECCP module waits until
the start of a new PWM period before
generating a PWM signal.
TRIS
TRIS
TRIS
TRIS
prevent
the
generation
ECCPx/Output Pi
Output Pi
Output Pi
Output Pi
DS39974A-page 275
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