PIC18LF27J13T-I/SO Microchip Technology, PIC18LF27J13T-I/SO Datasheet - Page 266

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PIC18LF27J13T-I/SO

Manufacturer Part Number
PIC18LF27J13T-I/SO
Description
28-pin, GP, 128KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC 28 SOIC .300in T/R
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets

Specifications of PIC18LF27J13T-I/SO

Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 2.75 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC18F47J13 FAMILY
18.4
In Pulse-Width Modulation (PWM) mode, the CCP4 pin
produces up to a 10-bit resolution PWM output. Since
the CCP4 pin is multiplexed with a PORTB data latch,
the appropriate TRISx bit must be cleared to make the
CCP4 pin an output.
Figure 18-3 shows a simplified block diagram of the
CCP1 module in PWM mode.
For a step-by-step procedure on how to set up the CCP
module for PWM operation, see Section 18.4.3
“Setup for PWM Operation”.
FIGURE 18-3:
DS39974A-page 266
Note 1:
CCPR4H (Slave)
Duty Cycle Registers
Comparator
CCPR4L
2:
TMR2
PR2
Comparator
PWM Mode
The 8-bit TMR2 value is concatenated with the 2-bit
internal Q clock, or 2 bits of the prescaler, to create
the 10-bit time base.
CCP4 and its appropriate timers are used as an
example. For details on all of the CCP modules and
their timer assignments, see Table 18-2 and
Table 18-3.
(Note 1)
Clear Timer,
CCP1 pin and
latch D.C.
SIMPLIFIED PWM BLOCK
DIAGRAM
CCP4CON<5:4>
R
S
(2)
Q
TRISC<2>
RC2
Preliminary
A PWM output (Figure 18-4) has a time base (period)
and a time that the output stays high (duty cycle). The
frequency of the PWM is the inverse of the period
(1/period).
FIGURE 18-4:
18.4.1
The PWM period is specified by writing to the PR2
register. The PWM period can be calculated using the
following formula:
EQUATION 18-1:
PWM frequency is defined as 1/[PWM period].
When TMR2 is equal to PR2, the following three events
occur on the next increment cycle:
• TMR2 is cleared
• The CCP4 pin is set
• The PWM duty cycle is latched from CCPR4L into
(An exception: If the PWM duty cycle = 0%, the
CCP4 pin will not be set)
CCPR4H
Note:
PWM Period = [(PR2) + 1] • 4 • T
TMR2 = PR2
Duty Cycle
PWM PERIOD
The Timer2 postscalers (see Section 14.0
“Timer2 Module”) are not used in the
determination of the PWM frequency. The
postscaler could be used to have a servo
update rate at a different frequency than
the PWM output.
Period
TMR2 = Duty Cycle
(TMR2 Prescale Value)
PWM OUTPUT
 2010 Microchip Technology Inc.
TMR2 = PR2
OSC

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