NSK70721PE.C2 Intel, NSK70721PE.C2 Datasheet - Page 57

• Manufacturer Part Number: NSK70721PE.C2
• Manufacturer: Intel

Specifications of NSK70721PE.C2

• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 28
• Lead Free Status / RoHS Status: Supplier Unconfirmed

3.2.7
3.3
3.3.1
Datasheet
Deactivation
The EDSP may be deactivated by using control signals to stop transmission on the loop or by the
expiration of MAT. This section describes method of deactivation.
“Normal” Deactivation takes place when the QUIET control is asserted. QUIET may be asserted
using an input signal in hardware control mode or by setting a register bit (WR0:B1) in processor
control mode. Deactivation may be initiated at either the Master or the Slave Data Pump.
When QUIET is asserted the Data Pump moves from the present state directly to the Deactivated
state. In this state no signal is transmitted. A Slave Data Pump stays in the deactivated state until
there is no received signal (LOS=1). A Master Data Pump remains in the Deactivated state until it
detects that no signal is being received from the Slave. The Master then starts its LOS timer (
26). When the LOS timer expires the Data Pump moves to the Inactive state. If a received signal is
detected while the LOS timer is active, the LOS timer is reset and starts from zero when absence of
signal is again detected. The delay before moving to the Inactive state ensures that the line has been
quiet at the Master for a reasonable length of time before a new activation attempt occurs.
Special Features
Micro-interruption
The EMDP transient interruption protection process, which provides superior protection against
short interruptions in the received signal, is integrated into the loss of signal processing.
The EDSP monitors the received SNR on every baud. Whenever the noise margin drops below -6
dB, the EDSP freezes all the adaptive coefficients, moves to the Time-out state and starts the MIT
as described in
state the EDSP returns to the state from which it entered Time-out. The EDSP then allows the
coefficients to begin adapting again and begins to realign the phase of the local clock with the
phase of the received signal. If the received SNR does not increase above the -3 dB threshold
before MIT expires, the EDSP goes directly to the Deactivated state. Once in the Deactivated state,
transition to the Inactive state occurs in the manner described above in the section on Deactivation.
The only industry specification for the performance in the presence of short signal interruptions is
the micro-interruption test included in the ETSI ETR-152 standard (
specifically intended to simulate momentary open circuits caused by problems with splices in
twisted pair wires. In practice, DSL system problems are often due to other causes such as
momentary shorts on the line or nearby lightning strikes which may last much longer than the ETSI
specified line interruptions. Systems manufactured using the EDSP will pass the ETSI test using
the default values for MIT. In addition, the EDSP gives system manufacturers the ability to
program the MIT to further increase the micro-interruption capability. Since the signal may be lost
for many reasons and since the line conditions may change after an interruption it is not possible to
guarantee restoration of service when the cause of the problem is removed. In addition, the phase
relationship of the Master and Slave clocks will drift during the interruption, so it is necessary to
reacquire the phase of the received signal at the end of the interruption. The EDSP allows the
system manufacturer to set the duration of a timer which provides the best trade-off between
recovery from short loss of signal events and quick preparation for reactivation in the event
transmission cannot be reestablished.
Table 13
Enhanced Multi-Rate DSL Data Pump Chip Set — SK70725/SK70721
and
Table
28. If the noise margin rises above -3 dB while in the Time-out
Figure
23). This test is
Table
57