NSK70721PE.C2 Intel, NSK70721PE.C2 Datasheet - Page 52

• Manufacturer Part Number: NSK70721PE.C2
• Manufacturer: Intel

Specifications of NSK70721PE.C2

• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 28
• Lead Free Status / RoHS Status: Supplier Unconfirmed

SK70725/SK70721 — Enhanced Multi-Rate DSL Data Pump Chip Set
52
TDELTA
Figure 21. MDSL Activating State Detail - Framed Modes 6 and 7
Note 1) Master timer is reset to SMT2 + 1 count when signal is detected (LOS=0). The result is that the elapsed
time for timers SMT3, SMT4, and SMT5 and Master Activation Timer (MAT) at Master is approximately TDELTA
greater than the preset value. In most activation sequences, TDELTA ~ 1 count.
TMR_EXP=1
ACTREQ 0
ACTIVE=0
Data Driven
The Master and Slave Data Pumps continue through the activation process as shown in
and
trained with a two-level (S0) signal relying on system timers SMT2, SMT3, SMT4, and SMT5 to
maintain synchronization between the Master and Slave.
After the SMT5 timers have expired, progression through the remainder of the activation states is
data driven, that is, it relies on receipt of a particular signal from the other end to move to the next
sub-state. The Slave enters the 4LVLDET sub-state and waits for receipt of a four level (S1) signal
Data Driven
SMT2
LOS=0
LOS=1
Figure
SMT1
1
1
21. Both Data Pumps complete training of all the receiver components which can be
Pre-AGC(0001)
SIGDET (0011)
Pre-EC (0010)
AAGC (0100)
Activating
Master
PLL (0110)
Inactive
EC (0101)
4LVLDET
Active
(0000)
(0000)
(0111)
Master
10
19
0
Activation
Default
Values
Timer
Silent
S1
S1
S0
S0
Slave
103
19
27
39
64
78
0
AAGC (0010)
Activating
PLL2 (0101)
Wait (0001)
Inactive
EC (0011)
4LVLDET
Slave
Active
(0000)
(0100)
(0110)
(0000)
PLL1
LOS=1
LOS=0
Data Driven
TMR_EXP=1
ACTIVE=0
Datasheet
Figure 20