NSK70721PE.C2 Intel, NSK70721PE.C2 Datasheet - Page 44

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NSK70721PE.C2

Manufacturer Part Number
NSK70721PE.C2
Description
Manufacturer
Intel
Datasheet

Specifications of NSK70721PE.C2

Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
28
Lead Free Status / RoHS Status
Supplier Unconfirmed
SK70725/SK70721 — Enhanced Multi-Rate DSL Data Pump Chip Set
3.2.4
3.2.4.1
3.2.4.2
44
Read:
Data is placed on the data bus when the Data Read pin (READ) goes low. When READ is asserted,
the EDSP data bus lines go from tristate to active and place the data from the register addressed by
ADDR0-ADDR3 on to the data bus D0-D7.
Write:
The Data Write pin (WRITE) requires an active low pulse to enable a write transfer on the data bus.
Data transfer is triggered by the rising edge of the WRITE pulse. To ensure data is written to the
register addressed by ADDR0-ADDR3, valid data must be present on the EDSP data bus lines
before WRITE goes high.
Interrupt:
The Interrupt pin (INT) is an open drain output requiring an external pull-up resistor. The INT
output is pulled low when an internal interrupt condition occurs. INT is latched and held until Main
Status Register RD0 is read. An internal interruption results from a low-to-high transition in any of
the four status indicators: ACTIVE, ACTIVE, DEACTVTD or TMR_EXP. Any transition of the
LOS indicator will also cause an interrupt. The interrupts associated with transitions of the above
mentioned status bits may be masked by setting the appropriate bits in register WR2 as shown in
Table
Register Access
There are ten write only registers and seven read only registers available in the EDSP. Refer to
Table 7
Writing Registers
To write to an EDSP register, proceed as follows:
Reading Registers
Procedures for reading the EDSP registers vary by register. Registers RD0, RD1, RD2, RD5 and
RD6 are easily accessed. The process for reading registers RD3 and RD4 is more complex. Both
processes are described below.
To read registers RD0, RD1, RD2, RD5 or RD6:
1. Drive CHIPSEL low.
2. Set the register address on ADDR0-ADDR3.
3. Observe address setup time requirements.
4. Set 8-bit input data word on D0-D7.
5. Pull WRITE low, observing minimum pulse width.
6. Pull WRITE high, observing hold time requirements for data and address lines.
1. Pull CHIPSEL low.
2. Place the desired address onto ADDR0-ADDR3.
9.
for the list of registers. Following is the procedure to access the registers.
Datasheet

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