NSK70721PE.C2 Intel, NSK70721PE.C2 Datasheet - Page 33

• Manufacturer Part Number: NSK70721PE.C2
• Manufacturer: Intel

Specifications of NSK70721PE.C2

• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 28
• Lead Free Status / RoHS Status: Supplier Unconfirmed

3.1.6.10
3.1.6.11
Datasheet
7
0
0
0
0
0
1. Accuracy of noise margin is ±1 dB.
2. Reduce indicated noise margin by 6 dB if receiver gain (Register WR9) is increased by 6 dB.
MSB
Table 17. Noise Margin Register (RD2) (Continued)
Table 18. Coefficient Read Registers (RD3 and RD4)
Table 19. Activating Status Register (RD5)
6
0
0
0
0
0
5
0
0
0
0
0
4
1
1
1
1
1
3
1
1
0
0
0
RD3 (LSB), RD4 (MSB)—Coefficient Read Register
RD3 and RD4 are used to read various internal coefficient registers. The address of a particular
coefficient register to be read is first written in WR3, then RD3 and RD4 provide the content of that
coefficient register. Each coefficient is a 16 bit word whose lower byte is read from RD3 and upper
byte is read from RD4. The EDSP updates this word on each rising edge of the serial control frame
strobe signal, SRCTL_FS.
RD5—Activating Status Register
The ACT bits shown in
(For any state other than the Activating state, the ACT bits will be “0000”.) The contents of the
Activating status register may be used to monitor the progress of the training and activating
sequence in the EMDP.
7:0
Bit
2
0
0
1
1
0
LSB
1
1
0
1
0
1
Coefficient Word Value. RD3 contains the lower
byte; RD4 contains the upper byte.
Address: RD3<3:0> = 0011, RD4<3:0> = 0100
Default: xxh (x=undefined)
Attributes: Read Only.
Address: A<3:0> = 0101
Default: xxh (x=undefined)
Attributes: Read Only.
B3:B0
B7:B4
0
0
0
0
0
0
0000
0001
Bit
Coded Noise Margin
Enhanced Multi-Rate DSL Data Pump Chip Set — SK70725/SK70721
Description
Table 19
+13.0
+12.0
+11.0
+10.0
+9.0
Activating state in Master Mode
indicate the current state of the EMDP during the Activating state.
1,2
Pre-AGC
Inactive
7
1
1
1
1
MSB
6
1
1
1
1
5
1
1
1
1
4
1
1
1
1
3
1
1
0
0
Description
Reserved
2
0
0
1
1
LSB
1
1
0
1
0
Activating state in Slave Mode
0
0
0
0
0
Coded Noise Margin
Inactive
Wait
-3.0
-4.0
-5.0
-6.0
1,2
33