NSK70721PE.C2 Intel, NSK70721PE.C2 Datasheet - Page 51

• Manufacturer Part Number: NSK70721PE.C2
• Manufacturer: Intel

Specifications of NSK70721PE.C2

• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 28
• Lead Free Status / RoHS Status: Supplier Unconfirmed

Datasheet
Figure 20. MDSL Activating State Detail - Unframed Modes 0,1,2,4, and 5
TDELTA
Note 1) Master timer is reset to SMT2 + 1 count when signal is detected (LOS=0). The result is that the elapsed
time for timers SMT3, SMT4, and SMT5 and Master Activation Timer (MAT) at Master is approximately TDELTA
greater than the preset value. In most activation sequences, TDELTA ~ 1 count.
ACTREQ 0
TMR_EXP=1
ACTIVE=0
Data Driven
transmit S0 just as the Master gets to the SIGDET state and the change in the Master MAT will be
minimal. If the Slave is reset or connected to the line sometime after the activation sequence has
begun at the Master, the Master will remain in the SIGDET state until S0 is received or the MAT
expires. If S0 is received after the Master has been in SIGDET for some time, the change in the
setting of the MAT at the Master may be significant. This change in the Master reference timer,
which is referred to as TDELTA in
Slave Data Pumps to be synchronized for the remainder of the activation sequence.
Data Driven
SMT2
LOS=0
LOS=1
SMT1
1
1
Pre-AGC(0001)
SIGDET (0011)
Pre-EC (0010)
AAGC (0100)
Activating
Master
PLL (0110)
Inactive
EC (0101)
4LVLDET
Active
(0000)
(0000)
(0111)
Enhanced Multi-Rate DSL Data Pump Chip Set — SK70725/SK70721
Master
10
19
0
Figure 20
Activation
Default
Values
Timer
Silent
S1
S1
S0
S0
and
Slave
103
19
27
39
64
78
Figure
0
21, allows the substates of the Master and
AAGC (0010)
Activating
PLL2 (0101)
Wait (0001)
Inactive
EC (0011)
4LVLDET
Slave
Active
(0000)
(0100)
(0110)
(0000)
PLL1
LOS=1
LOS=0
Data Driven
TMR_EXP=1
ACTIVE=0
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