PSB50505EV13GXT Lantiq, PSB50505EV13GXT Datasheet - Page 249
PSB50505EV13GXT
Manufacturer Part Number
PSB50505EV13GXT
Description
Manufacturer
Lantiq
Datasheet
1.PSB50505EV13GXT.pdf
(290 pages)
Specifications of PSB50505EV13GXT
Lead Free Status / RoHS Status
Supplier Unconfirmed
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Table 35
No.
1
1A
2
2A
3
4
5
6
7
1)
Data Sheet
In case the Internal Clock Recovery Circuit is used for SRTS, the frequency deviation should be +/- 10 ppm
Parameter
T
F
T
F
Delay FRCLK falling to FRFRS
Setup time FRDAT before FRCLK
falling (center of bit period)
Hold time FRDAT after FRCLK falling
(center of bit period)
Setup time FRMFB before FRCLK
falling (center of bit period)
Hold time FRMFB after FRCLK falling
(center of bit period)
RFCLK
RFCLK
FRCLK
FRCLK
Framer Receive Interface Timing in FAM
: Period RFCLK
: Frequency RFCLK
: Period FRCLK
: Frequency FRCLK
1)
1)
249
PXB 4219E, PXB 4220E, PXB 4221E
Min
- 130
ppm
- 130
ppm
3
15
15
15
15
Limit Values
Typ
30,518
32,768
122
8,192
Electrical Characteristics
Max
+130
ppm
+130
ppm
32
IWE8, V3.4
2003-01-20
Unit
ns
MHz
ns
MHz
ns
ns
ns
ns
ns
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