PSB50505EV13GXT Lantiq, PSB50505EV13GXT Datasheet - Page 214

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PSB50505EV13GXT

Manufacturer Part Number
PSB50505EV13GXT
Description
Manufacturer
Lantiq
Datasheet

Specifications of PSB50505EV13GXT

Lead Free Status / RoHS Status
Supplier Unconfirmed
7.56
Destructive read Address 00110
Reset value: 0000
perd
peru
Note: A synchronization error (scri) generates a random number of parity errors
Data Sheet
15
7
ICRC Parity Errors at Clock Recovery Interface (per)
Parity Errors at the Clock Recovery Interface Downstream Pin SDOD
This field counts the amount of parity errors at the internal clock recovery
interface. In case there are more than 255 errors, the value is kept
Parity Errors at the Clock Recovery Interface Upstream Pin SDI
This field counts the amount of parity errors at the internal clock recovery
interface. In case there are more than 255 errors, the value is kept
H
H
perd[7:0]
peru[7:0]
214
PXB 4219E, PXB 4220E, PXB 4221E
Register Description
IWE8, V3.4
2003-01-20
8
0

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