PSB50505EV13GXT Lantiq, PSB50505EV13GXT Datasheet - Page 136

• Manufacturer Part Number: PSB50505EV13GXT
• Manufacturer: Lantiq

Specifications of PSB50505EV13GXT

• Lead Free Status / RoHS Status: Supplier Unconfirmed

6.1.4.1
Read/write Address 00800
Reset value: Not applicable. RAM must be reset and initialized via SW.
cond_down
_nibble
cond_en
Note: Bit positions 16 to 31 are not implemented and always read as "0":
Data Sheet
31
23
15
0
0
7
RAM4: AAL Transmit Conditioning Slot
Not used
CAS conditioning nibbles in downstream for the slot
Conditioning enable
0 =
1 =
0
0
CAS downstream freezing enabled in underrun or pointer
mismatch condition
CAS downstream conditioning enabled in underrun or pointer
mismatch condition
0
0
H
to 009FF
cond_en
0
0
Not used
H
136
PXB 4219E, PXB 4220E, PXB 4221E
0
0
cond_down_nibble[3:0]
0
0
Memory Structure
0
0
IWE8, V3.4
2003-01-20
24
16
0
0
8
0