PSB50505EV13GXT Lantiq, PSB50505EV13GXT Datasheet - Page 189

• Manufacturer Part Number: PSB50505EV13GXT
• Manufacturer: Lantiq

Specifications of PSB50505EV13GXT

• Lead Free Status / RoHS Status: Supplier Unconfirmed

7.34
Read/write Address 00028
Reset value 0001
utrange
utprtyen
utbaseadr
utlevel
utmaster
Data Sheet
15
7
Not used
utbaseadr[2:0]
UTOPIA Configuration Register (utconf)
UTOPIA Port Range
Controls the supported port range if the device is configured as UTOPIA
level 2 PHY-Layer (utlevel=0, utmaster=0, mapping_mode=000
000 =
001 =
010 =
011 =
100 =
101 =
110 =
111 =
UTOPIA parity check enable
0 =
1 =
UTOPIA base address
Defines the base address under which the PHY-Layer is accessible.
User has to set this value to 0 if device utlevel = 1.
UTOPIA interface level
In Master mode only UTOPIA level 1 is available.
0 =
1 =
UTOPIA Slave/Master configuration
0 =
1 =
H
Ports 0 to 7 enabled
Port 0 enabled
Ports 0 and 1 enabled
Ports 0 to 2 enabled
Ports 0 to 3 enabled
Ports 0 to 4 enabled
Ports 0 to 5 enabled
Ports 0 to 6 enabled
Disabled
Enabled
UTOPIA level 2
UTOPIA level 1
Slave mode (PHY-Layer)
Master mode (ATM-Layer)
H
utrange[2:0]
utlevel
189
utmaster
PXB 4219E, PXB 4220E, PXB 4221E
utprtyen
mapping_mode[2:0]
Register Description
utbaseadr[4:3]
IWE8, V3.4
2003-01-20
B
)
8
0