PSB50505EV13GXT Lantiq, PSB50505EV13GXT Datasheet - Page 164
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PSB50505EV13GXT
Manufacturer Part Number
PSB50505EV13GXT
Description
Manufacturer
Lantiq
Datasheet
1.PSB50505EV13GXT.pdf
(290 pages)
Specifications of PSB50505EV13GXT
Lead Free Status / RoHS Status
Supplier Unconfirmed
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7.11
Read/write Address 00011
Reset value: 0000
t
tslp
tulp
tdlp
vci_flt_ulp
vci_val_ulp
Note: Transparent loop: Data is looped and forwarded.
Note: For ATM ports with upstream UTOPIA loopback (pcfN[p_atm] = 1 and
Data Sheet
tulp
15
7
Non-transparent loop: Data is looped.
pcfN[p_ulp] = 1), all cells are looped regardless of their VCI value. The vci_flt_ulp
and vci_val_ulp[4:0] bits are don’t care.
Loopback Control Register (lpbc)
tdlp
Transparent serial loop
0 =
1 =
Transparent upstream UTOPIA loop
X =
0 =
1 =
Transparent downstream UTOPIA loop
0 =
1 =
VCI filter enable for upstream UTOPIA loop
0 =
1 =
5 LSB of the VCI value (i.e. channel number) to be looped on upstream
UTOPIA loop
H
Non-transparent
Transparent
When pcfN[p_atm] = 1
Non-transparent
Transparent
Non-transparent
Transparent
Disabled (all VCIs are looped)
Enabled (VCI selected by vci_val_ulp is looped)
vci_flt_
ulp
H
Not used
164
PXB 4219E, PXB 4220E, PXB 4221E
vci_val_ulp[4:0]
Register Description
IWE8, V3.4
2003-01-20
tslp
8
0
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