PSB50505EV13GXT Lantiq, PSB50505EV13GXT Datasheet - Page 118

• Manufacturer Part Number: PSB50505EV13GXT
• Manufacturer: Lantiq

Specifications of PSB50505EV13GXT

• Lead Free Status / RoHS Status: Supplier Unconfirmed

5.8
The basic processing time of an octet in the IWE8 is 12 clock cycles. As the time needed
to process one octet for each of the 8 ports must be less than the time required to transfer
one octet over a framer interface, this leads to the condition:
with:
m = 12 master-clock cycles needed for one octet per port
o = 8 ports
f = Framer-clock cycles per bit
b = 8 bits per octet
Table 29
Mode
FAM, SYM8 and EC
GIM E1 and SYM2
GIM T1
Data Sheet
m o
T
Clock
T CLOCK f b T FramerClk
----- -
12
Master Clock
f
Master Clock Frequency Depending on Mode
T
FramerClk
T
< 1/3 x T
< 1/12 x T
< 1/12 x T
CLOCK
FramerCLK
FramerCLK
FramerCLK
118
PXB 4219E, PXB 4220E, PXB 4221E
F
> 3 x F
> 12 x F
> 12 x F
CLOCK
FramerCLK
FramerCLK
FramerCLK
= 3 x 8.192 MHz
Interface Description
= 12 x 2.048 MHz
= 12 x 1.544 MHz
IWE8, V3.4
2003-01-20
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