IPTR-C2H-NIOS Altera, IPTR-C2H-NIOS Datasheet - Page 41

• Manufacturer Part Number: IPTR-C2H-NIOS
• Description: IP CORE Renewal Of IPT-C2H-NIOS
• Manufacturer: Altera

Specifications of IPTR-C2H-NIOS

• Software Application: IP CORE, NIOS Processor And Functions
• Core Architecture: Nios II
• Features: ANSI C Compliance, Straightforward C-to-Hardware Mapping, Reporting Of Generated Results
• Core Sub-architecture: Cyclone
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na

One-to-One
C-to-Hardware
Mapping
Example 3–1. Function with Arithmetic and Logical Operators
long long MAC (int* a, int* b, int len)
{
}
Altera Corporation
November 2009
long long result = 0;
while (len > 0)
{
}
return result;
result += *a++ * *b++;
len--;
This chapter describes how the Nios
(C2H) Compiler translates ANSI C constructs into functional blocks in a
hardware accelerator. Understanding the C-to-hardware mappings
enables you to write C functions optimized for the C2H Compiler to
achieve higher performance and lower resource utilization.
The C2H Compiler translates each element of C syntax to an equivalent
hardware structure using straightforward mapping rules. The mapping
rules provide a one-to-one association between elements of C syntax and
their equivalent hardware structures. By learning the C-to-hardware
mappings, you can control the hardware structure of an accelerator, based
on the structure of the C code.
The C2H Compiler can perform resource-sharing optimizations which
reduce the resource utilization for an accelerator. In these cases, the result
is a better than one-to-one mapping.
Arithmetic and Logical Operators
Every arithmetic and logical operator in the C code translates to a
corresponding hardware block in the accelerator. Consider the function
MAC() shown in
Example
9.1
3. C-to-Hardware Mapping
3–1.
®
II C-to-Hardware Acceleration
Reference
3–1