IPTR-C2H-NIOS Altera, IPTR-C2H-NIOS Datasheet - Page 13

• Manufacturer Part Number: IPTR-C2H-NIOS
• Description: IP CORE Renewal Of IPT-C2H-NIOS
• Manufacturer: Altera

Specifications of IPTR-C2H-NIOS

• Software Application: IP CORE, NIOS Processor And Functions
• Core Architecture: Nios II
• Features: ANSI C Compliance, Straightforward C-to-Hardware Mapping, Reporting Of Generated Results
• Core Sub-architecture: Cyclone
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na

Altera Corporation
November 2009
C2H Compiler calls other tools in the background to handle the hardware
and software integration tasks. Specifically, the C2H Compiler
automatically performs the following tasks in the background:
1.
2.
Rapid Design Iteration to Find Optimal Partitioning of
Hardware and Software
The C2H Compiler allows you to move the dividing line between
hardware and software easily in C code, without significant additional
design effort. As a result, you have the freedom to design iteratively, and
explore multiple architectures. By contrast, writing a hardware
accelerator by hand in a hardware description language (HDL) would
require a significant amount of time to create the logic design and
integrate it into the system. Changing the functional or performance
requirements of hand-written HDL blocks can significantly impact
design time.
With the C2H Compiler, you can accelerate as many functions as
necessary to achieve the desired performance. You can balance the trade-
off between performance and resource utilization with simple edits to the
C source.
With these tools available to you, the process of achieving desired system
performance undergoes a profound change: The balance of design time
shifts away from creating, interfacing, and debugging hardware in favor
of perfecting the algorithm implementation and finding the optimal
system architecture.
Accelerate Performance-Critical Sections of Code
The C2H Compiler converts only sections of code that you specify. A
typical program contains a mix of performance-critical code and other
code. Performance-critical sections are often iterative and simple, but
consume the majority of a program's execution time on a processor. They
might occupy the processor by either computing a value, moving data, or
both. The best use of hardware resources is to accelerate only the
performance-critical functions of a program, rather than converting an
entire program to hardware.
Calls SOPC Builder to specify how the accelerator connects to the
system, and then generates the system hardware.
Calls the Quartus
and generate an SRAM object file (.sof).
9.1
®
II software to recompile the hardware design
Introduction to the C2H Compiler
Nios II C2H Compiler User Guide
1–7