IPTR-C2H-NIOS Altera, IPTR-C2H-NIOS Datasheet - Page 109

• Manufacturer Part Number: IPTR-C2H-NIOS
• Description: IP CORE Renewal Of IPT-C2H-NIOS
• Manufacturer: Altera

Specifications of IPTR-C2H-NIOS

• Software Application: IP CORE, NIOS Processor And Functions
• Core Architecture: Nios II
• Features: ANSI C Compliance, Straightforward C-to-Hardware Mapping, Reporting Of Generated Results
• Core Sub-architecture: Cyclone
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na

Figure 4–7. CRC Scheduling Per Assignment
Altera Corporation
November 2009
Scheduling Information Per Assignment
Typically the number of assignments in a loop is fewer than the number
of states mapped for the hardware state machine that controls the loop.
When there are fewer assignments than states, this method of interpreting
the scheduling information is often easier.
In
displays all of the assignments whether they occur on states that are a part
of the critical path or not. As shown in the previous section the CPLI of
this loop is six due to the critical path variable crc.
the information shown when the example is compiled.
Using the methodology from
create a chart such as
page
Example
4–10.
Nios II C2H Compiler User Guide
4–2, there are four assignments in the loop. This section
Figure
9.1
4–8, corresponding to
“Cycles Per Loop Iteration
Understanding the C2H View
Example 4–2 on
Figure 4–7
(CPLI)”, you can
illustrates
4–15