IPR-FIR Altera, IPR-FIR Datasheet - Page 11

• Manufacturer Part Number: IPR-FIR
• Description: IP CORE Renewal Of IP-FIR
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-FIR

• Software Application: IP CORE, DSP Filters And Transforms
• Supported Families: Arria GX, Arria II GX, Cyclone, HardCopy, Stratix
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: Finite Impulse Response Compiler
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Chapter 1: About This Compiler
Performance and Resource Utilization
Table 1–5. FIR Compiler Performance—Cyclone III Devices (Part 2 of 2)
Table 1–6. FIR Compiler Performance—Stratix IV Devices
© December 2010 Altera Corporation
Combinational
Parallel (LE), pipeline level 1(2),
Parallel (M9K), pipeline level 1 (2),
Serial (M9K), pipeline level 1 (2),
Notes to
(1) GMAC = giga multiply accumulates per second (1 giga = 1,000 million).
(2) This FIR filter takes advantage of symmetric coefficients.
(3) Using EP3C10F256C6 devices.
(4) Using EP3C16F484C6 devices.
(5) Using EP3C40F780C6 devices.
(6) It may be possible to significantly reduce memory utilization by setting a lower target f
Combinational
Multibit Serial, pipeline level 1 (2), (3),
Multicycle variable (1 cycle) decimation by 4, pipeline level 1 (2),
Multicycle variable (1 cycle) interpolation by 4, pipeline level 2
Multicycle variable (1 cycle), pipeline level 2 (2),
Multicycle variable (4 cycle), pipeline level 2 (2),
Parallel (LE), pipeline level 1 (2),
Parallel (M9K), pipeline level 1
Serial (M9K), pipeline level 1 (2),
Notes to
(1) GMAC = giga multiply accumulates per second (1 giga = 1,000 million).
(2) This FIR filter takes advantage of symmetric coefficients.
(3) Using EP4SGX70DF29C2X devices.
(4) The data width is 16-bits and there are 4 serial units.
ALUTs
3,416
1,948
2,153
LUTs
327
766
336
200
741
717
821
245
Table
Table
1–5:
1–6:
Registers
Registers
Logic
3,715
2,155
Logic
1,166
1,274
1,936
1,398
2,672
1,730
462
844
415
Table 1–6
(3)
(3)
119,872
(3)
(3)
55,276
(3)
14,231
1,400
shows performance figures for Stratix IV devices:
Bits
120,030
148
796
157
(5)
14,167
64
Bits
208
(4)
Memory
Memory
(M9K)
42
16
—
45
11
1
6
1
(3)
(3)
(6)
M9K
48
3
8
ALUTs
16
28
36
8
8
8
8
8
(3)
Multipliers
(3)
Multipliers
(9x9)
(18x18)
—
—
—
—
14
24
48
14
—
—
—
MAX
.
(MHz)
288
283
323
f
(MHz)
max
503
443
372
443
323
421
457
523
f
max
Throughput
Throughput
(MSPS)
(MSPS)
288
283
36
101
443
372
443
421
457
81
58
FIR Compiler User Guide
(GMACs)
Processing
Equivalent
(GMACS)
Processing
Equivalent
28
27
3
10
43
36
43
41
44
8
6
(1)
(1)
1–7