STM32W108B-SK STMicroelectronics, STM32W108B-SK Datasheet - Page 171

• Manufacturer Part Number: STM32W108B-SK
• Description: STARTER KIT FOR STM32W108
• Manufacturer: STMicroelectronics
• Series: STM32r
• Type: MCUr

Specifications of STM32W108B-SK

• Featured Product: STM32 Cortex-M3 Companion Products
• Contents: Board
• Silicon Manufacturer: ST Micro
• Core Architecture: ARM
• Core Sub-architecture: Cortex - M3
• Silicon Core Number: STM32
• Silicon Family Name: STM32W108xx
• Kit Contents: Board
• Features: IEEE
• Mfg Application Notes: STM32W108 Adjacent Channel Rejection Measurements
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: *
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

STM32W108CB, STM32W108HB
Table 32.
Serial Controller 1
Serial Controller 2
Debug Monitor
MAC Transmit
Memory Fault
MAC Receive
Management
Sleep Timer
Usage Fault
MAC Timer
Exception
Hard Fault
Baseband
Bus Fault
PendSV
Security
SysTick
Timer 1
Timer 2
SVCall
Debug
IRQA
IRQB
IRQC
IRQD
ADC
NMI
-
-
NVIC exception table (continued)
Position
7-10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
2
3
4
5
6
Cannot be stopped or preempted by any exception but reset.
Asynchronous.
All classes of fault, when the fault cannot activate because of priority
or the Configurable Fault handler has been disabled. Synchronous.
MPU mismatch, including access violation and no match.
Synchronous.
Pre-fetch, memory access, and other address/memory-related faults.
Synchronous when precise and asynchronous when imprecise.
Usage fault, such as 'undefined instruction executed' or 'illegal state
transition attempt'. Synchronous.
Reserved.
System service call with SVC instruction. Synchronous.
Debug monitor, when not halting. Synchronous, but only active when
enabled. It does not activate if lower priority than the current
activation.
Reserved.
Pendable request for system service. Asynchronous and only pended
by software.
System tick timer has fired. Asynchronous.
Timer 1 peripheral interrupt.
Timer 2 peripheral interrupt.
Management peripheral interrupt.
Baseband peripheral interrupt.
Sleep Timer peripheral interrupt.
Serial Controller 1 peripheral interrupt.
Serial Controller 2 peripheral interrupt.
Security peripheral interrupt.
MAC Timer peripheral interrupt.
MAC Transmit peripheral interrupt.
MAC Receive peripheral interrupt.
ADC peripheral interrupt.
IRQA peripheral interrupt.
IRQB peripheral interrupt.
IRQC peripheral interrupt.
IRQD peripheral interrupt.
Debug peripheral interrupt.
Doc ID 16252 Rev 8
Description
Interrupts
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