STM32W108B-SK STMicroelectronics, STM32W108B-SK Datasheet - Page 104

• Manufacturer Part Number: STM32W108B-SK
• Description: STARTER KIT FOR STM32W108
• Manufacturer: STMicroelectronics
• Series: STM32r
• Type: MCUr

Specifications of STM32W108B-SK

• Featured Product: STM32 Cortex-M3 Companion Products
• Contents: Board
• Silicon Manufacturer: ST Micro
• Core Architecture: ARM
• Core Sub-architecture: Cortex - M3
• Silicon Core Number: STM32
• Silicon Family Name: STM32W108xx
• Kit Contents: Board
• Features: IEEE
• Mfg Application Notes: STM32W108 Adjacent Channel Rejection Measurements
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: *
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Serial interfaces
9.13.14
9.13.15
9.13.16
104/209
31
15
31
15
31
Reserved
Reserved
30
14
30
14
30
Bits [12:0] SC_RXCNTB: The offset from the start of DMA receive buffer B at which the next byte will be
Bits [12:0] SC_RXCNTSAVED: Receive DMA count saved in SPI slave mode when nSSEL deasserts.
Bits [12:0] SC_RXERRA: The offset from the start of DMA receive buffer A of the first byte received with a
Saved receive DMA count register (SCx_RXCNTSAVED)
Address offset: 0xC870 (SC1_RXCNTSAVED) and 0xC070 (SC2_RXCNTSAVED)
Reset value:
DMA first receive error register A (SCx_RXERRA)
Address offset: 0xC834 (SC1_RXERRA) and 0xC034 (SC2_RXERRA)
Reset value:
DMA first receive error register B (SCx_RXERRB)
Address offset: 0xC838 (SC1_RXERRB) and 0xC038 (SC2_RXERRB)
Reset value:
29
13
29
13
29
written. This register is set to zero when the buffer is loaded and when the DMA is reset. If this
register is written when the buffer is not loaded, the buffer is loaded.
The count is only saved the first time nSSEL deasserts.
parity, frame, or overflow error. Note that an overflow error occurs at the input to the receive
FIFO, so this offset is 4 bytes before the overflow position. If there is no error, it reads zero. This
register will not be updated by subsequent errors until the buffer unloads and is reloaded, or the
receive DMA is reset.
28
12
28
12
28
27
11
27
11
27
0x0000 0000
0x0000 0000
0x0000 0000
26
10
26
10
26
25
25
25
9
9
Doc ID 16252 Rev 8
24
24
24
8
8
Reserved
Reserved
Reserved
23
23
23
7
7
SC_RXCNTSAVED
SC_RXERRA
22
22
22
6
6
r
r
21
21
21
5
5
STM32W108CB, STM32W108HB
20
20
20
4
4
19
19
19
3
3
18
18
18
2
2
17
17
17
1
1
16
16
16
0
0