SAF-XC164CS-32F40F BB-A Infineon Technologies, SAF-XC164CS-32F40F BB-A Datasheet - Page 19

IC MCU 16BIT 256KB FLSH 100TQFP

SAF-XC164CS-32F40F BB-A

Manufacturer Part Number
SAF-XC164CS-32F40F BB-A
Description
IC MCU 16BIT 256KB FLSH 100TQFP
Manufacturer
Infineon Technologies
Series
XC16xr
Datasheet

Specifications of SAF-XC164CS-32F40F BB-A

Core Processor
C166SV2
Core Size
16-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SPI, UART/USART
Peripherals
PWM, WDT
Number Of I /o
79
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.7 V
Data Converters
A/D 14x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LFQFP
Data Bus Width
16 bit
Data Ram Size
12 KB
Interface Type
2xASC, 2xSSC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
79
Number Of Timers
11
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 14 Channel
Packages
PG-TQFP-100
Max Clock Frequency
40.0 MHz
Sram (incl. Cache)
12.0 KByte
Can Nodes
2
A / D Input Lines (incl. Fadc)
14
Program Memory
256.0 KByte
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
3
The architecture of the XC164CS combines advantages of RISC, CISC, and DSP
processors with an advanced peripheral subsystem in a very well-balanced way. In
addition, the on-chip memory blocks allow the design of compact systems-on-silicon with
maximum performance (computing, control, communication).
The on-chip memory blocks (program code-memory and SRAM, dual-port RAM, data
SRAM) and the set of generic peripherals are connected to the CPU via separate buses.
Another bus, the LXBus, connects additional on-chip resources as well as external
resources (see
This bus structure enhances the overall system performance by enabling the concurrent
operation of several subsystems of the XC164CS.
The following block diagram gives an overview of the different on-chip components and
of the advanced, high bandwidth internal bus structure of the XC164CS.
Figure 3
Data Sheet
Debug Support
Clock Generator
P 20 P 9
10-Bit
14 Ch
8-Bit/
ADC
Osc / PLL
256 Kbytes
Flash/ROM
ProgMem
5
PSRAM
OCDS
Functional Description
Block Diagram
GPT
6
Figure
T2
T3
T4
T5
T6
USART
BRGen BRGen BRGen BRGen
ASC0
RTC
3).
USART
ASC1
WDT
Port 5
14
SSC0
SPI
Port 4
C166SV2 - Core
8
SSC1
Interrupt & PEC
SPI
DPRAM
17
CPU
Port 3
CC1
T0
T1
14
CC2
T7
T8
Interrupt Bus
PORT1
Functional Description
CC6
T12
T13
16
LXBus Control
External Bus
DSRAM
Derivatives
Control
V1.1, 2006-08
EBC
PORT0
MCB04323_X432R
XC164-32
Twin
A B
16
CAN

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