UPD70F3714GC-8BS-A Renesas Electronics America, UPD70F3714GC-8BS-A Datasheet - Page 574

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UPD70F3714GC-8BS-A

Manufacturer Part Number
UPD70F3714GC-8BS-A
Description
MCU 32BIT V850ES/LX2 64-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Ix2r
Datasheet

Specifications of UPD70F3714GC-8BS-A

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, UART/USART
Peripherals
LVD, PWM, WDT
Number Of I /o
39
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3714GC-8BS-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
<R>
572
(2) Restore
Recovery from an exception trap is carried out by the DBRET instruction. By executing the DBRET instruction,
the CPU carries out the following processing and controls the address of the restored PC.
<1> Loads the restored PC and PSW from DBPC and DBPSW.
<2> Transfers control to the address indicated by the restored PC and PSW.
Caution DBPC and DBPSW can be accessed only during the period between when the illegal opcode
The restore processing from an exception trap is shown below.
is executed and when the DBRET instruction is executed.
CHAPTER 14 INTERRUPT/EXCEPTION PROCESSING FUNCTION
Figure 14-10. Restore Processing from Exception Trap
CPU processing
Figure 14-9. Exception Trap Processing
PC
PSW
Jump to address of restored PC
User’s Manual U17716EJ2V0UD
DBRET instruction
DBPC
DBPSW
PSW.NP
PSW.EP
PSW.ID
PC
Exception trap (ILGOP) occurs
Exception processing
DBPC
DBPSW
Restored PC
PSW
1
1
1
00000060H

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