UPD70F3714GC-8BS-A Renesas Electronics America, UPD70F3714GC-8BS-A Datasheet - Page 301

• Manufacturer Part Number: UPD70F3714GC-8BS-A
• Description: MCU 32BIT V850ES/LX2 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Ix2r

Specifications of UPD70F3714GC-8BS-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, UART/USART
• Peripherals: LVD, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

CHAPTER 7 16-BIT TIMER/EVENT COUNTER Q (TMQ)
In order to transfer data from the TQ0CCRa register to the CCRa buffer register, the TQ0CCR1 register
must be written.
To change both the cycle and active level width of the PWM waveform at this time, first set the cycle to the
TQ0CCR0 register, set the active level width to the TQ0CCR2 and TQ0CCR3 registers, and then set an
active level to the TQ0CCR1 register.
To change only the cycle of the PWM waveform, first set the cycle to the TQ0CCR0 register, and then write
the same value (same as preset value of the TQ0CCR1 register) to the TQ0CCR1 register.
To change only the active level width (duty factor) of the PWM waveform, first set an active level to the
TQ0CCR2 and TQ0CCR3 registers and then set an active level to the TQ0CCR1 register.
To change only the active level width (duty factor) of the PWM waveform output by the TOQ01 pin, only the
TQ0CCR1 register has to be set.
To change only the active level width (duty factor) of the PWM waveform output by the TOQ02 and TOQ03
pins, first set an active level width to the TQ0CCR2 and TQ0CCR3 registers, and then write the same
value (same as preset value of the TQ0CCR1 register) to the TQ0CCR1 register.
After data is written to the TQ0CCR1 register, the value written to the TQ0CCRa register is transferred to
the CCRa buffer register in synchronization with clearing of the 16-bit counter, and is used as the value
compared with the 16-bit counter.
To write the TQ0CCR0 to TQ0CCR3 registers again after writing the TQ0CCR1 register once, do so after
the INTTQ0CC0 signal is generated. Otherwise, the value of the CCRa buffer register may become
undefined because timing of transferring data from the TQ0CCRa register to the CCRa buffer register
conflicts with writing the TQ0CCRa register.
Remark
a = 0 to 3
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User’s Manual U17716EJ2V0UD