UPD70F3714GC-8BS-A Renesas Electronics America, UPD70F3714GC-8BS-A Datasheet - Page 148

• Manufacturer Part Number: UPD70F3714GC-8BS-A
• Description: MCU 32BIT V850ES/LX2 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Ix2r

Specifications of UPD70F3714GC-8BS-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, UART/USART
• Peripherals: LVD, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

<R>
146
(3) TMPm I/O control register 0 (TPmIOC0)
Notes 1. Valid only for TMP0. Be sure to clear bits 1 and 0 of TMP2 and TMP3 to 0.
The TPmIOC0 register is an 8-bit register that controls the timer output (TOP00, TOPm1 pins).
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
Remark
2. The output level of the timer output pins (TOP00 and TOPm1) specified by the TPmOLa (a = 0, 1) bit
(m = 0, 2, 3)
is shown below (a = 0, 1).
TPmIOC0
TMP1 does not have the TP1IOC0 register.
After reset: 00H
TOP00, TOPm1 pin output
TP0OL0
TP0OE0
TPmOE1
• When TPmOLa bit = 0
TPmOL1
CHAPTER 6 16-BIT TIMER/EVENT COUNTER P (TMP)
0
1
0
1
0
1
0
1
0
7
Note 1
Note 1
16-bit counter
TPmCE bit
Timer output prohibited
• Low level is output from the TOPm1 pin when the TPmOL1 bit = 0.
• High level is output from the TOPm1 pin when the TPmOL1 bit = 1.
Timer output enabled (A pulse is output from the TOPm1 pin.)
Timer output prohibited
• Low level is output from the TOP00 pin when the TP0OL0 bit = 0.
• High level is output from the TOP00 pin when the TP0OL0 bit = 1.
Timer output enabled (A pulse is output from the TOP00 pin.)
R/W
TOPm1 pin starts output at high level.
TOPm1 pin starts output at low level.
TOP00 pin starts output at high level.
TOP00 pin starts output at low level.
6
0
User’s Manual U17716EJ2V0UD
Address: TP0IOC0 FFFFF642H, TP2IOC0 FFFFF682H,
5
0
TOPm1 pin output level setting
TP3IOC0 FFFFF6A2H
TOP00 pin output level setting
TOP00, TOPm1 pin output
TOPm1 pin output setting
TOP00 pin output setting
4
0
• When TPmOLa bit = 1
TPmOL1 TPmOE1 TP0OL0
3
16-bit counter
TPmCE bit
<2>
Note 2
Note 2
1
Note 1
TP0OE0
<0>
Note 1
(1/2)