UPD78F9221CS-CAC-A Renesas Electronics America, UPD78F9221CS-CAC-A Datasheet - Page 72
UPD78F9221CS-CAC-A
Manufacturer Part Number
UPD78F9221CS-CAC-A
Description
MCU 8BIT 2KB FLASH 20PIN
Manufacturer
Renesas Electronics America
Series
78K0S/Kx1+r
Datasheet
1.UPD78F9221MC-5A4-A.pdf
(418 pages)
Specifications of UPD78F9221CS-CAC-A
Core Processor
78K0S
Core Size
8-Bit
Speed
10MHz
Connectivity
LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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4.4
4.4.1
(1) In output mode
(2) In input mode
4.4.2
(1) In output mode
(2) In input mode
4.4.3
(1) In output mode
(2) In input mode
70
The operation of a port differs, as follows, depending on the setting of the I/O mode.
Caution Although a 1-bit memory manipulation instruction manipulates 1 bit, it accesses a port in 8-bit
The data can be written to the output latch by a transfer instruction. In addition, the data of the output latch are
output from the pin. Once data is written to the output latch, it is retained until new data is written to the output
latch.
When a reset signal is generated, cleans the data in the output latch.
The data can be written to the output latch by a transfer instruction. Because the output buffer is off, however,
the pin status remains unchanged.
Once data is written to the output latch, it is retained until new data is written to the output latch.
When a reset signal is generated, cleans the data in the output latch.
The data of the output latch can be read by a transfer instruction. The data of the output latch remain unchanged.
The pin status can be read by a transfer instruction. The contents of the output latch remain unchanged.
An operation is performed on the data of the output latch. The result is written to the output latch. The data of the
output latch are output from the pin.
Once data is written to the output latch, it is retained until new data is written to the output latch.
When a reset signal is generated, cleans the data in the output latch.
The pin level is read and an operation is performed on its data. The operation result is written to the output latch.
However, the pin status remains unchanged because the output buffer is off.
When a reset signal is generated, cleans the data in the output latch.
Operation of Port Function
Writing to I/O port
Reading from I/O port
Operations on I/O port
units. Therefore, the contents of the output latch of a pin in the input mode, even if it is not
subject to manipulation by the instruction, are undefined in a port with a mixture of inputs and
outputs.
CHAPTER 4 PORT FUNCTIONS
User’s Manual U16898EJ6V0UD
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