UPD78F9221CS-CAC-A Renesas Electronics America, UPD78F9221CS-CAC-A Datasheet - Page 249
UPD78F9221CS-CAC-A
Manufacturer Part Number
UPD78F9221CS-CAC-A
Description
MCU 8BIT 2KB FLASH 20PIN
Manufacturer
Renesas Electronics America
Series
78K0S/Kx1+r
Datasheet
1.UPD78F9221MC-5A4-A.pdf
(418 pages)
Specifications of UPD78F9221CS-CAC-A
Core Processor
78K0S
Core Size
8-Bit
Speed
10MHz
Connectivity
LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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High-speed internal oscillation clock or
High-speed internal oscillation clock or
Notes 1.
Remark When reset is effected, P130 outputs a low level. If P130 is set to output a high level before reset is
Notes 1.
2.
2.
effected, the output signal of P130 can be dummy-output as the reset signal to the CPU.
The operation stop time is 277 s (MIN.), 544 s (TYP.), and 1.075 ms (MAX.).
Set high level output using software.
The operation stop time is 276 s (MIN.), 544 s (TYP.), and 1.074 ms (MAX.).
Set high level output using software.
Internal reset signal
external clock input
external clock input
Internal reset signal
(except P130)
(except P130)
<1> With high-speed internal oscillation clock or external clock input
CPU clock
CPU clock
Port pin
Port pin
RESET
Port pin
RESET
Port pin
(P130)
(P130)
Figure 14-4. Reset Timing by RESET Input in STOP Mode
in progress
in progress
operation
operation
Normal
STOP instruction is executed.
STOP instruction is executed.
Normal
<2> With crystal/ceramic oscillation clock
CHAPTER 14 RESET FUNCTION
User’s Manual U16898EJ6V0UD
(oscillation stops)
(oscillation stops)
Stop status
Stop status
100 ns (TYP.)
100 ns (TYP.)
Delay
Delay
(oscillation stops)
(oscillation stops)
Reset period
Reset period
100 ns (TYP.)
100 ns (TYP.)
Delay
Delay
Oscillation stabilization
time (2
Operation stops because option
byte is referenced
Operation stops because option
byte is referenced
10
/f
Normal operation (reset processing, CPU clock)
X
to 2
Hi-Z
Hi-Z
17
/f
X
)
Normal operation
(reset processing, CPU clock)
Note 1
Note 1
.
.
Note 2
Note 2
247
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