UPD78F9221CS-CAC-A Renesas Electronics America, UPD78F9221CS-CAC-A Datasheet - Page 413

• Manufacturer Part Number: UPD78F9221CS-CAC-A
• Description: MCU 8BIT 2KB FLASH 20PIN
• Manufacturer: Renesas Electronics America
• Series: 78K0S/Kx1+r

Specifications of UPD78F9221CS-CAC-A

• Core Processor: 78K0S
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

3rd edition
Edition
Modification of 12.1 Interrupt Function Types
Modification of 12.4.2 Multiple interrupt servicing
Addition of Caution to Example 1 in Figure 12-10 Example of Multiple Interrupts (1/2)
Addition of Example 3 to Figure 12-10 Example of Multiple Interrupts (1/2)
Modification of reset signal in Figure 13-3 HALT Mode Release by Reset Signal
Generation
Modification of description in External interrupt of Table 13-4 Operating Statuses in
STOP Mode
Modification of description in and addition of Note to (a) Release by unmasked interrupt
request in (2) of 13.2.2 STOP mode
Modification of reset signal in Figure 13-6 STOP Mode Release by Reset Signal
Generation
Modification of Figure 14-1 Block Diagram of Reset Function
Addition of delay time of internal reset signal generation to Figure 14-2 Timing of Reset
by RESET Input and Figure 14-4 Reset Timing by RESET Input in STOP Mode
Modification of Figure 15-3 Example of Software Processing After Release of Reset
(1/2)
Modification of Figure 16-1 Block Diagram of Low-Voltage Detector
Modification of Note 1 in Figure 16-2 Format of Low-Voltage Detect Register (LVIM)
Modification of Note in Figure 16-3 Format of Low-Voltage Detection Level Select
Register (LVIS)
Modification of INTLVI and Note 2 in Figure 16-5 Timing of Low-Voltage Detector
Interrupt Signal Generation
Modification of (2) in <Action> of 16.5 Cautions for Low-Voltage Detector
Modification of Figure 16-6 Example of Software Processing After Release of Reset
(1/2)
Modification of description and configuration in CHAPTER 17 OPTION BYTE
Modification of Caution in Figure 17-2 Format of Option Byte (1/2)
Addition of Remarks 3, 4 to Figure 17-2 Format of Option Byte (2/2)
Modification of and addition to 18.1 Features
Figure 18-2 Environment for Writing Program to Flash Memory is divided into two
figures, in the case of FlashPro4 and in the case of PG-FPL2
Modification of Caution in Table 18-5 Oscillation Frequency and PG-FP4 GUI
Software Setting Value Example
Deletion of 18.7.1 Flash memory programming mode
Modification of 18.7.2 Communication commands
Modification of and addition to 18.8.2 Cautions on self programming function
Addition of <Setting conditions> in 3. Operating conditions of WEPRERR flag of 18.8.3
Registers used for self programming function (3)
Addition of description to Figure 18-15 Format of Flash Programming Command
Register (FLCMD)
APPENDIX E REVISION HISTORY
User’s Manual U16898EJ6V0UD
Description
CHAPTER 12
INTERRUPT
FUNCTIONS
CHAPTER 13
STANDBY FUNCTION
CHAPTER 14 RESET
FUNCTION
CHAPTER 15 POWER-
ON-CLEAR CIRCUIT
CHAPTER 16 LOW-
VOLTAGE DETECTOR
CHAPTER 17 OPTION
BYTE
CHAPTER 18 FLASH
MEMORY
Applied to:
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