UPD78F9221CS-CAC-A Renesas Electronics America, UPD78F9221CS-CAC-A Datasheet - Page 339

• Manufacturer Part Number: UPD78F9221CS-CAC-A
• Description: MCU 8BIT 2KB FLASH 20PIN
• Manufacturer: Renesas Electronics America
• Series: 78K0S/Kx1+r

Specifications of UPD78F9221CS-CAC-A

• Core Processor: 78K0S
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

CMP
ADDW
SUBW
CMPW
INC
DEC
INCW
DECW
ROR
ROL
RORC
ROLC
SET1
CLR1
SET1
CLR1
NOT1
Mnemonic
Remark
A, #byte
saddr, #byte
A, r
A, saddr
A, !addr16
A, [HL]
A, [HL + byte]
AX, #word
AX, #word
AX, #word
r
saddr
r
saddr
rp
rp
A, 1
A, 1
A, 1
A, 1
saddr.bit
sfr.bit
A.bit
PSW.bit
[HL].bit
saddr.bit
sfr.bit
A.bit
PSW.bit
[HL].bit
CY
CY
CY
One instruction clock cycle is one CPU clock cycle (f
register (PCC).
Operand
CHAPTER 20 INSTRUCTION SET OVERVIEW
Bytes
2
3
2
2
3
1
2
3
3
3
2
2
2
2
1
1
1
1
1
1
3
3
2
3
2
3
3
2
3
2
1
1
1
User’s Manual U16898EJ6V0UD
Clocks
10
10
4
6
4
4
8
6
6
6
6
6
4
4
4
4
4
4
2
2
2
2
6
6
4
6
6
6
4
6
2
2
2
(saddr)
A
A
A
A
AX, CY
AX, CY
AX
r
(saddr)
r
(saddr)
rp
rp
(CY, A
(CY, A
(CY
(CY
(saddr.bit)
sfr.bit
A.bit
PSW.bit
(HL).bit
(saddr.bit)
sfr.bit
A.bit
PSW.bit
(HL).bit
CY
CY
CY
A
A
byte
r
(saddr)
(addr16)
(HL)
(HL + byte)
r + 1
r
word
rp + 1
rp
7
0
1
0
CY
A
A
1
1
0
0
7
1
0
byte
, A
, A
1
(saddr) + 1
(saddr)
AX + word
AX
1
0
A
A
1
0
0
7
7
0
, A
, A
1
0
CPU
m 1
m+1
word
CY, A
CY, A
) selected by the processor clock control
Operation
1
A
A
m 1
m+1
m
m
)
)
1
1
A
A
m
m
)
)
1
1
Z
Flag
AC CY
337
1
0