UPD78F9221CS-CAC-A Renesas Electronics America, UPD78F9221CS-CAC-A Datasheet - Page 200

• Manufacturer Part Number: UPD78F9221CS-CAC-A
• Description: MCU 8BIT 2KB FLASH 20PIN
• Manufacturer: Renesas Electronics America
• Series: 78K0S/Kx1+r

Specifications of UPD78F9221CS-CAC-A

• Core Processor: 78K0S
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

11.4 Operation of Serial Interface UART6
11.4.1 Operation stop mode
addition, the pins can be used as ordinary port pins in this mode. To set the operation stop mode, clear bits 7, 6, and
5 (POWER6, TXE6, and RXE6) of ASIM6 to 0.
(1) Register used
198
Address: FF90H After reset: 01H R/W
Serial interface UART6 has the following two modes.
In this mode, serial communication cannot be executed; therefore, the power consumption can be reduced. In
Notes 1.
Caution Clear POWER6 to 0 after clearing TXE6 and RXE6 to 0 to set the operation stop mode.
Remark To use the RxD6/P44 and TxD6/INTP1/P43 pins as general-purpose port pins, see CHAPTER 4 PORT
Symbol
ASIM6
The operation stop mode is set by asynchronous serial interface operation mode register 6 (ASIM6).
ASIM6 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to 01H.
Operation stop mode
Asynchronous serial interface (UART) mode
2.
To start the operation, set POWER6 to 1, and then set TXE6 and RXE6 to 1.
FUNCTIONS.
The output of the T
POWER6 = 0 during a transmission.
Asynchronous serial interface reception error status register 6 (ASIS6), asynchronous serial interface
transmission status register 6 (ASIF6), bit 7 (SBRF6) and bit 6 (SBRT6) of asynchronous serial
interface control register 6 (ASICL6), and receive buffer register 6 (RXB6) are reset.
POWER6
POWER6
RXE6
TXE6
0
<7>
Note 1
0
0
Disable operation of the internal operation clock (fix the clock to low level) and asynchronously
reset the internal circuit
Disable transmission operation (synchronously reset the transmission circuit).
Disable reception (synchronously reset the reception circuit).
TXE6
<6>
X
D6 pin goes high and the input from the R
CHAPTER 11 SERIAL INTERFACE UART6
RXE6
<5>
User’s Manual U16898EJ6V0UD
Enabling/disabling operation of internal operation clock
Note 2
.
PS61
Enabling/disabling transmission
4
Enabling/disabling reception
PS60
3
X
CL6
D6 pin is fixed to high level when
2
SL6
1
ISRM6
0