UPD78F9221CS-CAC-A Renesas Electronics America, UPD78F9221CS-CAC-A Datasheet - Page 198

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UPD78F9221CS-CAC-A

Manufacturer Part Number
UPD78F9221CS-CAC-A
Description
MCU 8BIT 2KB FLASH 20PIN
Manufacturer
Renesas Electronics America
Series
78K0S/Kx1+r
Datasheet

Specifications of UPD78F9221CS-CAC-A

Core Processor
78K0S
Core Size
8-Bit
Speed
10MHz
Connectivity
LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
196
Cautions 1. In the case of an SBF reception error, return to SBF reception mode again. The status of the
Figure 11-10. Format of Asynchronous Serial Interface Control Register 6 (ASICL6) (2/2)
2. Before setting the SBRT6 bit to 1, make sure that bit 7 (POWER6) and bit 5 (RXE6) of ASIM6 =
3. The read value of the SBRT6 bit is always 0. SBRT6 is automatically cleared to 0 after SBF
4. Before setting the SBTT6 bit to 1, make sure that bit 7 (POWER6) and bit 6 (TXE6) of ASIM6 =
5. The read value of the SBTT6 bit is always 0. SBTT6 is automatically cleared to 0 at the end of
6. Before rewriting the DIR6 and TXDLV6 bits, clear the TXE6 and RXE6 bits to 0.
TXDLV6
SBL62
DIR6
SBRF6 flag will be held (1). For details on SBF reception refer to (2) – (i) SBF reception in
11.4.2 Asynchronous serial interface (UART) mode described later.
1. Moreover, after setting the SBRT6 bit to 1, do not clear the SBRT6 bit to 0 before the SBF
reception ends (an interrupt request signal is generated).
reception has been correctly completed.
1. Moreover, after setting the SBTT6 bit to 1, do not clear the SBTT6 bit to 0 before the SBF
transmission ends (an interrupt request signal is generated).
SBF transmission.
1
1
1
0
0
0
0
1
0
1
0
1
MSB
LSB
Normal output of T
Inverted output of T
SBL61
0
1
1
0
0
1
1
0
CHAPTER 11 SERIAL INTERFACE UART6
SBL60
X
X
D6
1
0
1
0
1
0
1
0
D6
User’s Manual U16898EJ6V0UD
SBF is output with 13-bit length.
SBF is output with 14-bit length.
SBF is output with 15-bit length.
SBF is output with 16-bit length.
SBF is output with 17-bit length.
SBF is output with 18-bit length.
SBF is output with 19-bit length.
SBF is output with 20-bit length.
Enabling/disabling inverting T
Specification of first bit
SBF transmission output width control
X
D6 output

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