UPD78F9221CS-CAC-A Renesas Electronics America, UPD78F9221CS-CAC-A Datasheet - Page 46
UPD78F9221CS-CAC-A
Manufacturer Part Number
UPD78F9221CS-CAC-A
Description
MCU 8BIT 2KB FLASH 20PIN
Manufacturer
Renesas Electronics America
Series
78K0S/Kx1+r
Datasheet
1.UPD78F9221MC-5A4-A.pdf
(418 pages)
Specifications of UPD78F9221CS-CAC-A
Core Processor
78K0S
Core Size
8-Bit
Speed
10MHz
Connectivity
LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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3.3.2 Immediate addressing
3.3.3 Table indirect addressing
44
[Function]
[Illustration]
[Function]
[Illustration]
Immediate data in the instruction word is transferred to the program counter (PC) to branch.
This function is carried out when the CALL !addr16 and BR !addr16 instructions are executed.
CALL !addr16 and BR !addr16 instructions can be used to branch to all the memory spaces.
In case of CALL !addr16 and BR !addr16 instructions
The table contents (branch destination address) of the particular location to be addressed by the immediate data
of an instruction code from bit 1 to bit 5 are transferred to the program counter (PC) to branch.
Table indirect addressing is carried out when the CALLT [addr5] instruction is executed. This instruction can be
used to branch to all the memory spaces according to the address stored in the memory table 40H to 7FH.
Effective address + 1
Effective address
Instruction code
PC
PC+1
PC+2
PC
15
7
PC
15
7
15
7
0
0
CHAPTER 3 CPU ARCHITECTURE
CALL or BR
High addr.
Low addr.
1
0
6
User’s Manual U16898EJ6V0UD
Memory (Table)
5
0
High addr.
Low addr.
0
ta
0
4–0
0
0
8 7
0
1
0
8
0
8
0
0
0
7
7
6
1
5
0
1
0
0
0
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