M30835FJGP#U5 Renesas Electronics America, M30835FJGP#U5 Datasheet - Page 262

• Manufacturer Part Number: M30835FJGP#U5
• Description: IC M32C/83 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30835FJGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 121
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 31K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R
R
M
e
E
. v
3
J
Table 17.9 Trigger Select Function Settings
NOTES:
0
i= 0,1
2
ADiCON0 Register
17.2.4 Two-Circuit Simultaneous Start (Software Trigger)
17.2.5 Pin Input Replacement Function
1
TRG = 0
TRG = 1
9
C
3 .
2. The A/D conversion is restarted if an external trigger or a hardware trigger is inserted during the A/D conversion.
B
A/D0 and A/D1 start simultaneously when the PST bit in the AD0CON2 register is set to "1" (two-circuit
simultaneous start).
Do not set the PST bit to "1" while either A/D0 or A/D1 is performing an A/D conversion, or if the TRG bit
is set "1" (external trigger).
Do not set the ADST bit to "1" (A/D conversion started) when using the PST bit.
When the ADS bit in the AD0CON2 register is set to "1" (channel replacement enabled), channels of the
A/D0 can be replaced with channels of the A/D1 and vice versa.
Voltage applied to the ANj (j = 0 to 7) pin is converted to digital code in the A/D1 and the conversion result
is stored into the AD1j register. Voltage applied to the AN0j, AN2j or AN15j pin is converted to digital code
in the A/D0 and the conversion results are stored into the AD0j register.
To set the ADS bit to "1", set the MD1 to MD0 bits in the AD0CON0 register to "00
"01
OPA1 to OPA0 bits in the AD0CON1 register to "00
both AD0CON0 register and AD1CON0 register, and to both AD0CON1 register and AD1CON1 register.
1. The A/Di starts the A/D conversion when the ADST bit is set to "1" (A/D conversion started) and a trigger is
8 /
0
1
0
3
generated.
(The A/D conversion in process is aborted.)
3
2
J
G
" (repeat mode). Single sweep, repeat sweep 0, and repeat sweep 1 modes cannot be used. Set the
4
a
0 -
n
o r
(1)
3 .
1
Bit and Setting
u
, 1
3
p
1
2
(
0
M
0
3
6
2
C
-
-
TRG1 to TRG0 = 00
TRG1 to TRG0 = 01
TRG1 to TRG0 = 10
Page 237
8 /
ADiCON2 Register
, 3
M
3
2
C
f o
8 /
4
3
8
8
) T
2
2
2
Software trigger
The A/Di starts the A/D conversion when the ADST bit in the
ADiCON0 register is set to "1"
Two-circuit simultaneous start
A/D0 and A/D1 start the A/D conversion simultaneously when the
PST bit in the AD0CON2 register is set to "1" by program (Refer to
17.2.4 Two-Circuit Simultaneous Start)
External trigger
Falling edge of a signal applied to AD
Hardware trigger
The timer B2 interrupt request of three-phase motor control timer
functions (after the ICTB2 counter completes counting)
Hardware trigger
The intelligent I/O interrupt request is generated
Channel 1 in the group 2 (A/D0), channel 1 in the group 3 (A/D1)
2
" (no ANEX0 and ANEX1 used). Set the same value to
(2)
(2)
(2)
Trigger
__________
TRG
2
" (one-shot mode) or
17. A/D Converter