HD64F3048F16 Renesas Electronics America, HD64F3048F16 Datasheet - Page 555

IC H8 MCU FLASH 128K 100QFP

HD64F3048F16

Manufacturer Part Number
HD64F3048F16
Description
IC H8 MCU FLASH 128K 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of HD64F3048F16

Core Processor
H8/300H
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Package
100PQFP
Family Name
H8
Maximum Speed
16 MHz
Operating Supply Voltage
5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
70
Interface Type
SCI
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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The register settings and examples of starting character waveforms are shown below for two smart
cards, one following the direct convention and one the inverse convention.
In the H8/3048B Group, the SINV bit inverts only the data bits D7 to D0. The parity bit is not
inverted, so the O/E bit in SMR must be set to odd parity mode. This applies in both transmitting
and receiving.
Direct convention (SDIR = SINV = O/E = 0)
In the direct convention, state Z corresponds to logic level 1, and state A to logic level 0.
Characters are transmitted and received LSB-first. In the example above the first character data
is H'3B. The parity bit is 1, following the even parity rule designated for smart cards.
Inverse convention (SDIR = SINV = O/E = 1)
In the inverse convention, state A corresponds to the logic level 1, and state Z to the logic level
0. Characters are transmitted and received MSB-first. In the example above the first character
data is H'3F. Following the even parity rule designated for smart cards, the parity bit logic
level is 0, corresponding to state Z.
(Z)
(Z)
Ds
Ds
A
A
D0
D7
Z
Z
D1
D6
Z
Z
D2
D5
A
A
D3
D4
A
Z
D4
D3
Z
A
D5
D2
A
Z
Rev. 3.00 Sep 27, 2006 page 527 of 872
D6
D1
A
A
Section 14 Smart Card Interface
D7
D0
A
A
Dp
Dp
Z
Z
REJ09B0325-0300
(Z)
(Z)
State
State

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