HD64F3048F16 Renesas Electronics America, HD64F3048F16 Datasheet - Page 367

IC H8 MCU FLASH 128K 100QFP

HD64F3048F16

Manufacturer Part Number
HD64F3048F16
Description
IC H8 MCU FLASH 128K 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of HD64F3048F16

Core Processor
H8/300H
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Package
100PQFP
Family Name
H8
Maximum Speed
16 MHz
Operating Supply Voltage
5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
70
Interface Type
SCI
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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10.2.5
TOER is an 8-bit readable/writable register that enables or disables output settings for channels 3
and 4.
TOER is initialized to H'FF by a reset and in standby mode.
Bits 7 and 6—Reserved: Read-only bits, always read as 1.
Bit 5—Master Enable TOCXB4 (EXB4): Enables or disables ITU output at pin TOCXB
Bit 4—Master Enable TOCXA4 (EXA4): Enables or disables ITU output at pin TOCXA
Bit 5: EXB4
0
1
Bit 4: EXA4
0
1
Bit
Initial value
Read/Write
Timer Output Master Enable Register (TOER)
Reserved bits
Description
TOCXB
a generic input/output pin).
If XTGD = 0, EXB4 is cleared to 0 when input capture A occurs in channel 1.
TOCXB
Description
TOCXA
a generic input/output pin).
If XTGD = 0, EXA4 is cleared to 0 when input capture A occurs in channel 1.
TOCXA
7
1
4
4
4
4
output is disabled regardless of TFCR settings (TOCXB
is enabled for output according to TFCR settings
output is disabled regardless of TFCR settings (TOCXA
is enabled for output according to TFCR settings
6
1
Master enable TOCXA4, TOCXB4
These bits enable or disable output
settings for pins TOCXA
EXB4
R/W
5
1
Master enable TIOCA3, TIOCB3 , TIOCA4, TIOCB4
These bits enable or disable output settings for pins
TIOCA
EXA4
R/W
3
4
1
, TIOCB
Section 10 16-Bit Integrated Timer Unit (ITU)
4
Rev. 3.00 Sep 27, 2006 page 339 of 872
and TOCXB
EB3
R/W
3
3
1
, TIOCA
EB4
R/W
4
4
, and TIOCB
2
1
R/W
EA4
REJ09B0325-0300
1
1
4
4
4
operates as
(Initial value)
operates as
(Initial value)
EA3
R/W
4
0
1
4
.
.

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