HD64F3048F16 Renesas Electronics America, HD64F3048F16 Datasheet - Page 31

• Manufacturer Part Number: HD64F3048F16
• Description: IC H8 MCU FLASH 128K 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3048F16

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Package: 100PQFP
• Family Name: H8
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 70
• Interface Type: SCI
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Feature
Refresh
controller
DMA controller
(DMAC)
16-bit integrated
timer unit (ITU)
Description
DRAM refresh
Pseudo-static RAM refresh
Usable as an interval timer
Short address mode
Full address mode
Five 16-bit timer channels, capable of processing up to 12 pulse outputs or
10 pulse inputs
One 16-bit timer counter (channels 0 to 4)
Two multiplexed output compare/input capture pins (channels 0 to 4)
Operation can be synchronized (channels 0 to 4)
PWM mode available (channels 0 to 4)
Phase counting mode available (channel 2)
Buffering available (channels 3 and 4)
Reset-synchronized PWM mode available (channels 3 and 4)
Complementary PWM mode available (channels 3 and 4)
DMAC can be activated by compare match/input capture A interrupts
(channels 0 to 3)
Directly connectable to 16-bit-wide DRAM
CAS-before-RAS refresh
Self-refresh mode selectable
Self-refresh mode selectable
Maximum four channels available
Selection of I/O mode, idle mode, or repeat mode
Can be activated by compare match/input capture A interrupts from ITU
channels 0 to 3, transmit-data-empty and receive-data-full interrupts from
SCI channel 0, or external requests
Maximum two channels available
Selection of normal mode or block transfer mode
Can be activated by compare match/input capture A interrupts from ITU
channels 0 to 3, external requests, or auto-request
Rev. 3.00 Sep 27, 2006 page 3 of 872
Section 1 Overview
REJ09B0325-0300