HD6413003TF16V Renesas Electronics America, HD6413003TF16V Datasheet - Page 433

• Manufacturer Part Number: HD6413003TF16V
• Description: MCU 5V 0K PB-FREE 112-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD6413003TF16V

• Core Size: 16-Bit
• Oscillator Type: Internal
• Core Processor: H8/300H
• Speed: 16MHz
• Connectivity: SCI
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 50
• Program Memory Type: ROMless
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• No. Of I/o's: 58
• Ram Memory Size: 512Byte
• Cpu Speed: 16MHz
• No. Of Timers: 11
• No. Of Pwm Channels: 4
• Digital Ic Case Style: QFP
• Supply Voltage: RoHS Compliant
• Controller Family/series: H8/300H
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Bits 2 to 0—Clock Select 2 to 0 (CKS2/1/0): These bits select one of eight internal clock
sources, obtained by prescaling the system clock (ø), for input to TCNT.
Bit 2
CKS2
0
1
12.2.3 Reset Control/Status Register (RSTCSR)
RSTCSR is an 8-bit readable and writable
generated by watchdog timer overflow, and controls external output of the reset signal.
Bits 7 and 6 are initialized by input of a reset signal at the RES pin. They are not initialized by
reset signals generated by watchdog timer overflow.
Notes: 1. RSTCSR is write-protected by a password. For details see section 12.2.4, Notes on
Bit
Initial value
Read/Write
2. Only 0 can be written in bit 7, to clear the flag.
Bit 1
CKS1
0
1
0
1
Register Access.
Watchdog timer reset
Indicates that a reset signal has been generated
R/(W)
WRST
Bit 0
CKS0
0
1
0
1
0
1
0
1
7
0
*
2
Reset output enable
Enables or disables external output of the reset signal
RSTOE
R/W
Description
ø/2
ø/32
ø/64
ø/128
ø/256
ø/512
ø/2048
ø/4096
6
0
—
—
5
1
*1
register that indicates when a reset signal has been
413
—
—
4
1
Reserved bits
—
—
3
1
—
—
2
1
—
—
1
1
(Initial value)
—
—
0
1