DF36037FZJV Renesas Electronics America, DF36037FZJV Datasheet - Page 60

MCU 3/5V 56K PB-FREE J-TEMP 64-L

DF36037FZJV

Manufacturer Part Number
DF36037FZJV
Description
MCU 3/5V 56K PB-FREE J-TEMP 64-L
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet

Specifications of DF36037FZJV

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SSU
Peripherals
PWM, WDT
Number Of I /o
45
Program Memory Size
56KB (56K x 8)
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
For Use With
R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Section 2 CPU
Table 2.6
[Legend]
B: Byte
Note:
Rev. 4.00 Mar. 15, 2006 Page 26 of 556
REJ09B0026-0400
Instruction
BSET
BCLR
BNOT
BTST
BAND
BIAND
BOR
BIOR
*
Refers to the operand size.
Bit Manipulation Instructions (1)
Size*
B
B
B
B
B
B
B
B
Function
1
Sets a specified bit in a general register or memory operand to 1. The bit
number is specified by 3-bit immediate data or the lower three bits of a
general register.
0
Clears a specified bit in a general register or memory operand to 0. The
bit number is specified by 3-bit immediate data or the lower three bits of
a general register.
¬ (<bit-No.> of <EAd>)
Inverts a specified bit in a general register or memory operand. The bit
number is specified by 3-bit immediate data or the lower three bits of a
general register.
¬ (<bit-No.> of <EAd>)
Tests a specified bit in a general register or memory operand and sets
or clears the Z flag accordingly. The bit number is specified by 3-bit
immediate data or the lower three bits of a general register.
C
ANDs the carry flag with a specified bit in a general register or memory
operand and stores the result in the carry flag.
C
ANDs the carry flag with the inverse of a specified bit in a general
register or memory operand and stores the result in the carry flag.
The bit number is specified by 3-bit immediate data.
C
ORs the carry flag with a specified bit in a general register or memory
operand and stores the result in the carry flag.
C
ORs the carry flag with the inverse of a specified bit in a general register
or memory operand and stores the result in the carry flag.
The bit number is specified by 3-bit immediate data.
¬ (<bit-No.> of <EAd>)
(<bit-No.> of <EAd>)
¬ (<bit-No.> of <EAd>)
(<bit-No.> of <EAd>)
(<bit-No.> of <EAd>)
(<bit-No.> of <EAd>)
(<bit-No.> of <EAd>)
Z
C
C
C
C

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