DF36037FZJV Renesas Electronics America, DF36037FZJV Datasheet - Page 310

MCU 3/5V 56K PB-FREE J-TEMP 64-L

DF36037FZJV

Manufacturer Part Number
DF36037FZJV
Description
MCU 3/5V 56K PB-FREE J-TEMP 64-L
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet

Specifications of DF36037FZJV

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SSU
Peripherals
PWM, WDT
Number Of I /o
45
Program Memory Size
56KB (56K x 8)
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
For Use With
R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Section 14 Serial Communication Interface 3 (SCI3)
Rev. 4.00 Mar. 15, 2006 Page 276 of 556
REJ09B0026-0400
(A)
Yes
No
Figure 14.8 Sample Serial Reception Data Flowchart (Asynchronous Mode) (1)
Read receive data in RDR
Clear RE bit in SCR3 to 0
Read RDRF flag in SSR
Read OER, PER, and
OER+PER+FER = 1
All data received?
FER flags in SSR
Start reception
RDRF = 1
<End>
Yes
No
No
(Continued on next page)
Error processing
[1]
Yes
[2]
[3]
[4]
[1] Read the OER, PER, and FER flags in
[2] Read SSR and check that RDRF = 1,
[3] To continue serial reception, before the
[4] If a receive error occurs, read the OER,
The RDRF flag is cleared automatically.
SSR to identify the error. If a receive
error occurs, performs the appropriate
error processing.
then read the receive data in RDR.
The RDRF flag is cleared automatically.
stop bit for the current frame is
received, read the RDRF flag and read
RDR.
PER, and FER flags in SSR to identify
the error. After performing the
appropriate error processing, ensure
that the OER, PER, and FER flags are
all cleared to 0. Reception cannot be
resumed if any of these flags are set to
1. In the case of a framing error, a
break can be detected by reading the
value of the input port corresponding to
the RxD pin.

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