DF36037FZJV Renesas Electronics America, DF36037FZJV Datasheet - Page 118

MCU 3/5V 56K PB-FREE J-TEMP 64-L

DF36037FZJV

Manufacturer Part Number
DF36037FZJV
Description
MCU 3/5V 56K PB-FREE J-TEMP 64-L
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet

Specifications of DF36037FZJV

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SSU
Peripherals
PWM, WDT
Number Of I /o
45
Program Memory Size
56KB (56K x 8)
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
For Use With
R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Section 6 Power-Down Modes
Note:
6.2.1
In sleep mode, CPU operation is halted but the on-chip peripheral modules function at the clock
frequency set by the MA2, MA1, and MA0 bits in SYSCR2. CPU register contents are retained.
When an interrupt is requested, sleep mode is cleared and interrupt exception handling starts.
Sleep mode is not cleared if the I bit of the condition code register (CCR) is set to 1 or the
requested interrupt is disabled in the interrupt enable register. After sleep mode is cleared, a
transition is made to active mode when the LSON bit in SYSCR2 is 0, and a transition is made to
subactive mode when the bit is 1.
When the RES pin goes low, the CPU goes into the reset state and sleep mode is cleared.
6.2.2
In standby mode, the clock pulse generator stops, so the CPU and on-chip peripheral modules stop
functioning. However, as long as the rated voltage is supplied, the contents of CPU registers, on-
chip RAM, and some on-chip peripheral module registers are retained. On-chip RAM contents
will be retained as long as the voltage set by the RAM data retention voltage is provided. The I/O
ports go to the high-impedance state.
Rev. 4.00 Mar. 15, 2006 Page 84 of 556
REJ09B0026-0400
Function
Peripheral
functions
*
Sleep Mode
Standby Mode
Registers can be read from or written to in subactive mode.
Timer V
Watchdog
timer
SCI3, SCI3_2*
TinyCAN
SSU
Subtimer
Timer B1
Timer Z
A/D converter
2
Active Mode
Functioning
Functioning
Functioning
Functioning
Functioning
Functioning
Functioning
Functioning
Functioning
Sleep Mode
Functioning
Functioning
Functioning
Functioning
Functioning
Functioning
Functioning
Functioning
Functioning
Subactive
Mode
Reset
Retained (functioning if the internal oscillator are
selected as a count clock*)
Reset
Retained
Retained
Functioning
Retained*
Retained (When internal clock
count clock, the counter counts up with sub
clock*.)
Reset
Subsleep
Mode
Reset
Reset
Retained
Retained
Functioning
Retained
Reset
Standby Mode
Reset
Reset
Retained
Retained
Retained
(functioning if
the on-chip
oscillator is
enabled)
Retained
Reset
is selected as a

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