DF36037FZJV Renesas Electronics America, DF36037FZJV Datasheet - Page 395

MCU 3/5V 56K PB-FREE J-TEMP 64-L

DF36037FZJV

Manufacturer Part Number
DF36037FZJV
Description
MCU 3/5V 56K PB-FREE J-TEMP 64-L
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet

Specifications of DF36037FZJV

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SSU
Peripherals
PWM, WDT
Number Of I /o
45
Program Memory Size
56KB (56K x 8)
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
For Use With
R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
16.4.3
Relationship of connection between the data input/output pin and SSTRSR changes according to a
combination of the MSS bit in SSCRH and the SSUMS bit in SSCRL. It also changes by the
BIDE bit in SSCRH. Figure 16.3 shows the relationship.
(1) When SSUMS = 0:
(3) When SSUMS = 1, BIDE = 0, and MSS = 0:
Figure 16.3 Relationship between Data Input/Output Pin and Shift Register
Relationship between Data Input/Output Pin and Shift Register
Shift register
Shift register
(SSTRSR)
(SSTRSR)
SSO
SSI
SSO
SSI
Section 16 Synchronous Serial Communication Unit (SSU)
(2) When SSUMS = 1, BIDE = 0, and MSS = 1:
(4) When SSUMS = 1 and BIDE = 1:
Shift register
Shift register
Rev. 4.00 Mar. 15, 2006 Page 361 of 556
(SSTRSR)
(SSTRSR)
REJ09B0026-0400
SSO
SSI
SSO
SSI

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