DF36037FZJV Renesas Electronics America, DF36037FZJV Datasheet - Page 391

MCU 3/5V 56K PB-FREE J-TEMP 64-L

DF36037FZJV

Manufacturer Part Number
DF36037FZJV
Description
MCU 3/5V 56K PB-FREE J-TEMP 64-L
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet

Specifications of DF36037FZJV

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SSU
Peripherals
PWM, WDT
Number Of I /o
45
Program Memory Size
56KB (56K x 8)
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
For Use With
R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Bit
3
2
1
0
Bit Name
TEND
TDRE
RDRF
CE
Initial
Value
0
1
0
0
R/W
R/W
R/W
R/W
R/W
Description
Transmit End
[Setting condition]
[Clearing conditions]
Transmit Data Empty
[Setting conditions]
[Clearing conditions]
Receive Data Register Full
[Setting condition]
[Clearing conditions]
Conflict Error Flag
[Setting conditions]
[Clearing condition]
When the last bit of data is transmitted, the TDRE bit
is 1
When 0 is written to this bit after reading 1
When data is written in SSTDR
When the TE bit in SSER is 0
When data transfer is performed from SSTDR to
SSTRSR and data can be written in SSTDR
When 0 is written to this bit after reading 1
When data is written in SSTDR
When serial reception is completed normally and
receive data is transferred from SSTRSR to SSRDR
When 0 is written to this bit after reading 1
When data is read from SSRDR
When serial communication is started while SSUMS =
1 and MSS =1, the SCS pin input is low
When the SCS pin level changes from low to high
during transfer while SSUMS = 1 and MSS = 0
When 0 is written to this bit after reading 1
Section 16 Synchronous Serial Communication Unit (SSU)
Rev. 4.00 Mar. 15, 2006 Page 357 of 556
REJ09B0026-0400

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