R5F2121AJFP#U0 Renesas Electronics America, R5F2121AJFP#U0 Datasheet - Page 393
R5F2121AJFP#U0
Manufacturer Part Number
R5F2121AJFP#U0
Description
MCU FLASH 96K 5K CMOS 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/21r
Datasheet
1.R5F21216JFP.pdf
(503 pages)
Specifications of R5F2121AJFP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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R8C/20 Group, R8C/21 Group
Rev.2.00 Aug 27, 2008
REJ09B0250-0200
19. Flash Memory
19.1
Table 19.1
NOTES:
Flash Memory Operating Mode
Division of Erase Block
Program Method
Erase Method
Program, Erase Control Method
Rewrite Control Method
Number of Commands
Programming
and erase
endurance
ID Code Check Function
ROM Code Protect
In the flash memory version, rewrite operations to the flash memory can be performed in three modes; CPU
rewrite, standard serial I/O, parallel I/O modes.
Table 19.1 lists the Flash Memory Performance (see Table 1.1 and Table 1.2 Performance for the items not listed
on Table 19.1).
1. Definition of programming and erasure endurance
2. Blocks A and B are embedded only in the R8C/21 Group.
The programming and erasure endurance is defined on a per-block basis.
If the programming and erasure endurance is n (n = 100 or 10,000), each block can be erased n
times. For example, if 1,024 1-byte writes are performed to different addresses in block A, a 1-Kbyte
block, and then the block is erased, the programming/erasure endurance still stands at one. When
performing 100 or more rewrites, the actual erasure endurance can be reduced by executing
programming operations in such a way that all blank areas are used before performing an erase
operation. Avoid rewriting only particular blocks and try to average out the programming and erasure
endurance of the blocks. It is also advisable to retain data on the erasure endurance of each block
and limit the number of erase operations to a certain number.
Overview
(1)
Flash Memory Performance
Item
Blocks 0 and 1
(Program ROM)
Blocks A and B
(Data Flash)
Page 375 of 458
(2)
3 modes (CPU rewrite, standard serial I/O, and parallel I/O mode)
See Figure 19.1 and Figure 19.2
Byte unit
Block erase
Program and erase control by software command
Rewrite control for blocks 0 and 1 by FMR02 bit in FMR0 register
Rewrite control for block 0 by FMR16 bit and block 1 by FMR16 bit
5 commands
R8C/20 Group: 100 times; R8C/21 Group: 1,000 times
10,000 times
Standard serial I/O mode supported
For parallel I/O mode supported
Specification
19. Flash Memory
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