R5F2121AJFP#U0 Renesas Electronics America, R5F2121AJFP#U0 Datasheet - Page 108

MCU FLASH 96K 5K CMOS 48-LQFP

R5F2121AJFP#U0

Manufacturer Part Number
R5F2121AJFP#U0
Description
MCU FLASH 96K 5K CMOS 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/21r
Datasheet

Specifications of R5F2121AJFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F2121AJFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
135
Company:
Part Number:
R5F2121AJFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/20 Group, R8C/21 Group
Rev.2.00 Aug 27, 2008
REJ09B0250-0200
Figure 12.2
12.1.5
Table 12.1
NOTE:
Undefined Instruction 0FFDCh to 0FFDFh
Overflow
BRK Instruction
Address Match
Single Step
Watchdog Timer
Oscillation Stop
Detection
Voltage Monitor 2
Address Break
(Reserved)
Reset
12.1.5.1
1. Do not use the single-step interrupt. For development tools only.
Interrupt Source
There are 4 bytes in one vector. Set the starting address of interrupt routine in each vector table. When an
interrupt request is acknowledged, the CPU branches to the address set in the corresponding interrupt vector.
Figure 12.2 shows the Interrupt Vector.
The fixed vector tables are allocated addresses 0FFDCh to 0FFFFh.
Table 12.1 lists the Fixed Vector Tables. The vector addresses (H) of fixed vectors are used by the ID code
check function. For details, refer to 19.3 Functions to Prevent Rewriting of Flash Memory.
Interrupts and Interrupt Vector
(1)
Fixed Vector Tables
Interrupt Vector
Fixed Vector Tables
(1)
Vector address (H)
Vector address (L)
Page 90 of 458
0FFE0h to 0FFE3h
0FFE4h to 0FFE7h
0FFE8h to 0FFEBh
0FFECh to 0FFEFh
0FFF0h to 0FFF3h
0FFF4h to 0FFF7h
0FFF8h to 0FFFBh
0FFFCh to 0FFFFh
Address (L) to (H)
Vector Addresses
MSB
0 0 0 0
0 0 0 0
Interrupt on UND
If the content of address
instruction
Interrupt on INTO
instruction
0FFE7h is FFh, program
execution starts from the
address shown by the
vector in the relocatable
vector table.
Low address
Mid address
Remarks
High address
0 0 0 0
R8C/Tiny Series software
manual
12.4 Address Match
13. Watchdog Timer
10. Clock Generation Circuit
6. Voltage Detection Circuit
5. Resets
LSB
Interrupt
Reference
12. Interrupts

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