R5F2121AJFP#U0 Renesas Electronics America, R5F2121AJFP#U0 Datasheet - Page 291

• Manufacturer Part Number: R5F2121AJFP#U0
• Description: MCU FLASH 96K 5K CMOS 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/21r

Specifications of R5F2121AJFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/20 Group, R8C/21 Group
Rev.2.00 Aug 27, 2008
REJ09B0250-0200
Figure 15.7
• Example of transmit timing (when internal clock is selected)
• Example of receive timing (when external clock is selected)
The above applies under the following settings:
The following conditions are met when “H” is applied to the CLK0 pin before receiving data:
fEXT: Frequency of external clock
The above applies under the following settings:
TE bit in U0C1
register
TI bit in U0C1
register
CLK0
TXD0
TXEPT bit in
U0C0 register
IR bit in S0TIC
register
RE bit in U0C1
register
TE bit in U0C1
register
TI bit in U0C1
register
CLK0
RXD0
RI bit in U0C1
register
IR bit in S0RIC
register
• CKDIR bit in U0MR register = 1 (external clock)
• CKPOL bit in U0C0 register = 0 (output transmit data at the falling edge and input receive data at the rising edge of the transfer clock)
• TE bit in U0C1 register = 1 (enables transmit)
• RE bit in U0C1 register = 1 (enables receive)
• Write dummy data to the U0TB register
• CKDIR bit in U0MR register = 0 (internal clock)
• CKPOL bit in U0C0 register = 0 (output transmit data at the falling edge and input receive data at the rising edge of the transfer clock)
• U0IRS bit in U0C1 register = 0 (an interrupt request is generated when the transmit buffer is empty)
Transfer clock
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
Transmit and Receive Timing Example in Clock Synchronous Serial I/O Mode
Set data in U0TB register
Write dummy data to U0TB register
Transfer from U0TB register to UART0 transmit register
Transfer from UART0 receive register to
Transfer from U0TB register to UART0 transmit register
D0
D0
D1
D1
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D2
D2
TCLK
D3
D3
1/fEXT
U0RB register
D4
D4
TC
Receive data is taken in
D5
D5
D6
D6
Set to 0 when interrupt request is acknowledged, or set by a program
D7
D7
D0 D1
Set to 0 when interrupt request is acknowledged, or set by a program
D0 D1
D2
D3
D2
Read out from U0RB register
D3
D4
TC = TCLK = 2(n+1)/fi
D5
D4
fi: Frequency of UiBRG count source (f1, f8, f32)
n: Setting value to UiBRG register
D6
D5
D7
Stop pulsing because the TE bit is set to 0
D0 D1
D2
D3
D4
15. Serial Interface
D5
D6
D7